ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Universal Asynchronous Receiver-Transmitter
(UART) Ports—Receive and Transmit Timing
For information on the UART port receive and transmit opera-
tions, see the ADSP-BF52x Hardware Reference Manual.
General-Purpose Port Timing
Table 51 and Figure 30 describe general-purpose
port operations.
Table 51. General-Purpose Port Timing for ADSP-BF522/ADSP-BF524/ADSP-BF526 Processors
VDDEXT
1.8V Nominal
Parameter
Min
Max
Timing Requirement
tWFI
General-Purpose Port Ball Input Pulse Width
Switching Characteristic
tSCLK + 1
tGPOD
General-Purpose Port Ball Output Delay from CLKOUT 0
11.0
Low
VDDEXT
2.5 V or 3.3V Nominal
Min
Max
Unit
tSCLK + 1
ns
0
8.2
ns
Table 52. General-Purpose Port Timing for ADSP-BF523/ADSP-BF525/ADSP-BF527 Processors
VDDEXT
1.8V Nominal
Parameter
Min
Max
Timing Requirement
tWFI
General-Purpose Port Ball Input Pulse Width
Switching Characteristic
tSCLK + 1
tGPOD
General-Purpose Port Ball Output Delay from CLKOUT Low 0
8.2
VDDEXT
2.5 V or 3.3V Nominal
Min
Max
Unit
tSCLK + 1
ns
0
6.5
ns
CLKOUT
GPIO OUTPUT
GPIO INPUT
tGPOD
tWFI
Figure 30. General-Purpose Port Timing
Rev. D | Page 61 of 88 | July 2013