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ADSP-BF537BBCZ-5AV View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
ADSP-BF537BBCZ-5AV
ADI
Analog Devices ADI
'ADSP-BF537BBCZ-5AV' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
SPECIFICATIONS
Note that component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min
Nominal Max
Unit
VDDINT Internal Supply Voltage1 Nonautomotive 300 MHz, 400 MHz, and 500 MHz speed 0.8
1.2
1.32
V
grade models2
VDDINT Internal Supply Voltage1 Nonautomotive 533 MHz speed grade models2
0.8
1.25
1.375
V
VDDINT Internal Supply Voltage1 Nonautomotive 600 MHz speed grade models2
0.8
1.3
1.43
V
VDDINT Internal Supply Voltage1 Automotive grade models and +105°C nonautomotive 0.95
1.2
grade models2
1.32
V
VDDEXT External Supply Voltage Nonautomotive grade models2
2.25
2.5 or 3.3 3.6
V
VDDEXT External Supply Voltage Automotive grade models and +105°C nonautomotive 2.7
3.0 or 3.3 3.6
V
grade models2
VDDRTC Real-Time Clock Power
Supply Voltage
2.25
3.6
V
VIH
VIHCLKIN
VIH5V
High Level Input Voltage3, 4
High Level Input Voltage5
5.0 V Tolerant Pins, High
Level Input Voltage6
VDDEXT = Maximum
VDDEXT = Maximum
2.0
V
2.2
V
0.7 × VDDEXT
V
VIH5V 5.0 V Tolerant Pins, High
Level Input Voltage7
VDDEXT = Maximum
VIL
Low Level Input Voltage3, 8 VDDEXT = Minimum
VIL5V 5.0 V Tolerant Pins, Low
Level Input Voltage6
2.0
V
+0.6
V
0.3 × VDDEXT V
VIL5V 5.0 V Tolerant Pins, Low
Level Input Voltage7
VDDEXT = Minimum
+0.8
V
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @ –40
TAMBIENT = –40°C to + 105°C
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @ –40
TAMBIENT = –40°C to + 85°C
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @ 0
TAMBIENT = 0°C to + 70°C
TJ
Junction Temperature
182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @ –40
TAMBIENT = –40°C to + 85°C
TJ
Junction Temperature
182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @ 0
TAMBIENT = 0°C to +70°C
+120
°C
+105
°C
+95
°C
+105
°C
+100
°C
1 The regulator can generate VDDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance. The
required VDDINT is a function of speed grade and operating frequency. See Table 10, Table 11, and Table 12 for details.
2 See Ordering Guide on Page 67.
3 Bidirectional pins (DATA15–0, PF15–0, PG15–0, PH15–0, TFS0, TSCLK0, RSCLK0, RFS0, MDIO) and input pins (BR, ARDY, DR0PRI, DR0SEC, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE2–0) of the ADSP-BF534/ADSP-BF536/ADSP-BF537 are 3.3 V-tolerant (always accept up to 3.6 V maximum VIH). Voltage
compliance (on outputs, VOH) is limited by the VDDEXT supply voltage.
4 Parameter value applies to all input and bidirectional pins except CLKIN, SDA, and SCL.
5 Parameter value applies to CLKIN pin only.
6 Applies to pins PJ2/SCL and PJ3/SDA which are 5.0 V tolerant (always accept up to 5.5 V maximum VIH). Voltage compliance (on outputs, VOH) is limited by the VDDEXT supply
voltage.
7 Applies to pin PJ4/DR0SEC/CANRX/TACI0 which is 5.0 V tolerant (always accepts up to 5.5 V maximum VIH). Voltage compliance (on outputs, VOH) is limited by the VDDEXT
supply voltage.
8 Parameter value applies to all input and bidirectional pins except SDA and SCL.
Rev. J | Page 23 of 68 | February 2014
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