ADSP-BF538F View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF538F' PDF : 56 Pages View PDF
Preliminary Technical Data
SDRAM Interface Timing
Table 20. SDRAM Interface Timing
Parameter
Timing Requirements
tSSDAT
DATA Setup Before CLKOUT
tHSDAT
DATA Hold After CLKOUT
Switching Characteristics
tSCLK
tSCLKH
tSCLKL
tDCAD
tHCAD
tDSDAT
tENSDAT
CLKOUT Period
CLKOUT Width High
CLKOUT Width Low
Command, ADDR, Data Delay After CLKOUT1
Command, ADDR, Data Hold After CLKOUT1
Data Disable After CLKOUT
Data Enable After CLKOUT
1 Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
CLKOUT
DATA (IN)
tSSDAT
D ATA(O UT)
ADSP-BF538/ADSP-BF538F
Min
Max
2.1
0.8
7.5
2.5
2.5
6.0
0.8
6.0
1.0
tSCLK
tSCLKH
tHSDAT
tSCLKL
tENSDAT
tDCAD
tD SDA T
tHCAD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
CMND ADDR
(OUT)
tDCAD
tHCAD
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
Figure 15. SDRAM Interface Timing
Rev. PrD | Page 29 of 56 | May 2006
Share Link: 
