AT90PWM81/161
7.3.2
user can avoid the four conditions above to ensure that the reference is turned off before enter-
ing Power-down mode.
Voltage Reference Characteristics
Table 7-4. Internal voltage reference characteristics (1).
Symbol Parameter
Condition Minimum
VBG
Bandgap reference voltage
tBG
Bandgap reference start-up
time
IBG
Bandgap reference current
consumption
Typical
1.1
40
15
Note: 1. Values are guidelines only.
Maximum
Units
V
µs
µA
7.4 Watchdog Timer
AT90PWM81/161 has an Enhanced Watchdog Timer (WDT). The main features are:
• Clocked from separate On-chip Oscillator
• Three operating modes
– Interrupt
– System reset
– Interrupt and system reset
• Selectable time-out period from 1ms to 8s
• Possible hardware fuse watchdog always on (WDTON) for fail-safe mode
Figure 7-7. Watchdog timer.
128 KHz
OSCILLATOR
7734Q–AVR–02/12
WDP3
MCU RESET
WDIF
WDIE
INTERRUPT
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128kHz oscillator.
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset
- instruction to restart the counter before the time-out value is reached. If the system doesn't
restart the counter, an interrupt or system reset will be issued.
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