ATA6617 View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

ATA6617

8K/16K Flash Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel Corporation 

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Figure 4-7. Program Memory Map

Program Memory

0x0000

Flash end

4.4.2

SRAM Data Memory

Figure 4-8 shows how the Atmel® ATtiny87/167 SRAM Memory is organized.

The Atmel ATtiny87/167 is a complex microcontroller with more peripheral units than can be

supported within the 64 locations reserved in the Opcode for the IN and OUT instructions. For

the Extended I/O space in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be

used.

The data memory locations address both the Register File, the I/O memory, Extended I/O

memory, and the internal data SRAM. The first 32 locations address the Register File, the next

64 location the standard I/O memory, then 160 locations of Extended I/O memory, and the

next locations address the internal data SRAM (see “ISRAM size” in Table 4-3 on page 39).

The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-

ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register

File, registers R26 to R31 feature the indirect addressing pointer registers.

The direct addressing reaches the entire data space.

The Indirect with Displacement mode reaches 63 address locations from the base address

given by the Y- or Z-register.

When using register indirect addressing modes with automatic pre-decrement and post-incre-

ment, the address registers X, Y, and Z are decremented or incremented.

The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers and

the internal data SRAM in the Atmel ATtiny87/167 are all accessible through all these

addressing modes. The Register File is described in Section 4.3.4 “General Purpose Register

File” on page 34.

40 Atmel ATA6616/ATA6617

9132D–AUTO–12/10

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