CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
11.4 Chip Information
Register Name: Chip Information
I/O Index: 1Fh
Memory Offset: 81Fh
Register Per: chip
Register Compatibility Type: ext.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Cirrus Logic Host-Adapter
Identification
Dual/Single
Socket
CL-PD6833 Revision Level
DMA Capable
R:11
R:1
R:1111
R:1
Bit 0 — DMA Capable
A ‘1’ in this bit indicates that the CL-PD6833 is capable of DMA.
Bits 4:1 — CL-PD6833 Revision Level
This field is ‘1111’, indicating to software that Device Identification registers described in
Section 11.9 on page 159 are to be accessed to determine the Revision ID. In Cirrus Logic
PC Card controllers, if bits 4:1 of the register at Memory Offset 81Fh read back ‘0h’, the chip
information is contained in bits 3:0 of the register at Memory Offset 934h.
Bit 5 — Dual/Single Socket
0
Chip identified as a single-socket controller.
1
Chip identified as a dual-socket controller.
This bit specifies that the CL-PD6833 supports two sockets.
Bits 7:6 — Cirrus Logic Host-Adapter Identification
00
Second read after I/O write to this register.
11
First read after I/O write to this register.
This field identifies a Cirrus Logic host-adapter device. After chip reset or when doing an I/O write
to this register, the first read of this register returns a ‘11’. On the next read, this field is ‘00’. This
pattern of toggling data on subsequent reads can be used by software to determine presence of
a Cirrus Logic host adapter in a system or to determine the occurrence of a device reset.
June 1998
ADVANCE DATA BOOK v0.3
EXTENSION REGISTERS
137
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