CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
Table 2-3. Power Control and General Interface Pins (cont.)
Pin Name
Description
Pin Number Qty. I/O Pwr. Drive
LED_OUT*/
HW_SUSPEND#/
PME#/GPIO4‡
LED Output: This output can be used as an
LED driver to indicate disk activity when a
socket’s BVD2/-SPKR/-LED pin has been
programmed for LED support. The Extension
Control 1 register bit 2 must be set to ‘1’ to
enable this output (to reflect any activity on
BVD2/-SPKR/-LED), and a socket’s ATA
Control register bit 1 must be set to ‘1’ to allow
the level of the BVD2/-SPKR/-LED pin to reflect
disk activity.
Serves as a HW_SUSPEND# input pin, when
Misc Control 3 register bit 4 is set to ‘1’.
This pin is used for configuration information
133
during hardware reset. Refer to Misc Control 3
register bit 1.
General-Purpose Input/Output 4: This pin can
also be used for either input or output under the
control of the GPIO Input Control and GPIO
Output Control registers. This pin is grouped
with and powered from the +5V pins.
Power Management Event: This signal is used
to indicate that a card or the controller needs
service and is in a power state that prohibits the
use of an interrupt (see also the Pin Multiplex
Control 0 register at memory offset 914h).
SCLK
Serial Clock: This input is used as a reference
clock (10–100 kHz, usually 32 kHz) to control
the serial interface of the socket power control
chips.
132
CAUTION: This pin must be driven at all times.
See Section 3.1.7.1 on page 35 for more
information on socket power control.
SDATA/
SMBDATA‡
Serial Data / System Management Bus Data:
This pin serves as output pin SDATA when used
with the serial interface of Texas Instruments’
TPS2206AIDF socket power control chip, and
serves as a bidirectional pin SMBDATA when
used with Intel’s System Management Bus
131
used by Maxim’s socket power control chip. This
pin is open drain for the SMBus mode of opera-
tion and requires an external pull-up.
This pin is used to detect power-up during reset
(see Section 3.2 on page 38).
1
I/O
1
8 mA
1
I
–
–
8 mA
1
I/O
1
(for
SDATA)
22
PIN INFORMATION
ADVANCE DATA BOOK v0.3
June 1998
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