CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
3.1.5
PCI/Way DMA
The CL-PD6833 supports the PCI/Way DMA (direct memory access). This DMA approach is applicable
to a PC system that does not have an ISA bus as its main system bus. The approach requires that two or
more devices (on a non-ISA bus) support legacy DMA. Since the PCI/Way DMA specification describes
an approach that distributes independent, standard programming model bus-master channels among
devices, it is also popularly known as distributed DMA.
The CL-PD6833 provides complete, seamless support for DMA-capable PC Cards on the PCMCIA bus
as outlined in the PC Card Standard. When a DMA-capable PC Card requests DMA operation, the
CL-PD6833 uses the REQ#, GNT# protocol on the PCI bus to handle the DMA transfer. Programming
registers in the CL-PD6833 reflects the functions found in the legacy 8237 DMA controller chip.
3.1.6
Power Management
The CL-PD6833 employs power management techniques to provide long battery life. This is achieved by
minimizing the power consumption of the CL-PD6833 and that of the PC Cards. Substantial power is
saved by turning off the PCI_CLK to the CL-PD6833 or reducing the frequency of that clock. More power
can be saved by putting the CL-PD6833 in the HW (hardware) Suspend mode. To put the CL-PD6833 in
the HW Suspend mode, bit 4 of the Miscellaneous Control 3 (extended I/O index 25h) must be set to ‘1’.
Thereafter, the LED_OUT*/HW_SUSPEND# pin can be driven to a ‘0’ logic state. While in the HW
Suspend mode, the CL-PD6833 tristates all its outputs except the REQ# signal, which is driven high.
During HW Suspend mode, the PCI bus signals to the CL-PD6833 can be turned off. However, the RST#
signal on the PCI bus must always be held high. An inactive state of the RST# signal ensures that the
internal state of the CL-PD6833 is maintained during the power-down modes. Table 3-4 illustrates the
various power management modes and the corresponding power consumption.
Table 3-4. Power Consumption in Various Modes
Mode Name
RST# level
Measurement Conditions
Typical Power
Consumption
CL-PD6833 fully functional
PCI Bus active
Normal Operation
High
Core_VDD = 3.3 V
tbd
PCI_VCC,+5V = 5 V
Clock = 33 MHz
Only interrupts and RI_OUT* availablea
PCI Bus active
PCI_CLK Stopped
High
Core_VDD = 3.3 V
tbd
PCI_VCC,+5V = 5V
Clock = 0 MHz
Only interrupts and RI_OUT* available a
PCI bus turned off b
HW Suspend
PCI_CLK Stopped
High
Core_VDD = 3.3 V
+5V = 5V
tbd
PCI_VCC = 0 V
Clock = 0 MHz
a The CL-PD6833 uses the CLKRUN mechanism to assert ISA IRQs. PCI interrupts (INTA# and/or INTB#) and RI_OUT* can
be asserted while the PCI_CLK is stopped.
b The CL-PD6833 tristates all PCI bus signals. REQ# is driven high on the PCI bus.
34
INTRODUCTION TO THE CL-PD6833
ADVANCE DATA BOOK v0.3
June 1998
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