CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
External-Hardware Serial Signalling Mode
In this mode, the CL-PD6701 is used to establish a parallel power-control interface (refer to Figure 3-11).
This mode enables the use of parallel socket power control chips.
NOTE: In the CL-PD6833, this mode is currently the same as Texas Instruments TPS2206AIDF Serial
Signalling mode.
SDATA/SMBDATA (131)
SLATCH/SMBCLK (130)
CL-PD6833
SCLK (132)
SDATA
SLATCH
RST#
SDATA
SLATCH
RESET#
CL-PD6701
SCLK
SCLK
A_VPP_PGM
A_VPP_VCC
−A_VCC_5
−A_VCC_3
B_VPP_PGM
B_VPP_VCC
−B_VCC_3
−B_VCC_5
Figure 3-11. Power Control Using External-Hardware Signalling Mode
System Management Bus Signalling Mode
In this mode, the CL-PD6833 supports the Intel® SMBus (system management bus) protocol, which uses
a two-pin interface: SMBDATA and SMBCLK (refer to Figure 3-12). The system management bus is a sub-
set of the I2C bus. The serial data is available on the SMBDATA pin and the serial clock is on the SMBCLK
pin. The SCLK pin is used as a reference clock for the CL-PD6833. The Maxim MAX1601 dual-channel
PC Card VCC/VPP power-switching network supports the SMBus protocol. The PCI bus reset signal can
be used to reset the MAX1601 chip.
SDATA/SMBDATA (131)
SLATCH/SMBCLK (130)
CL-PD6833
SCLK (132)
RST#
SCLK
SMBDATA
SMBCLK
VL
MAX1601
Figure 3-12. Power Control Using SMBus Signalling Mode
3.1.7.2 Card Removal
When a card is removed from a socket, the CL-PD6833 automatically disables the VCC and VPP supplies to
the socket. The CL-PD6833 can also be configured to have management interrupts notify software of card
removal.
36
INTRODUCTION TO THE CL-PD6833
ADVANCE DATA BOOK v0.3
June 1998
Share Link: 
