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CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CL-PD6833-QC-A
Cirrus-Logic
Cirrus Logic Cirrus-Logic
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
5.14
PC Card 16-Bit IF Legacy Mode Base Address
Register Name: PC Card 16-Bit IF Legacy Mode Base Address
Offset: 44h
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
Register Per: chip
Bit 25
Bit 24
Byte 3
Bit 23
Bit 22
Controller I/O Base Address (high)
Bit 21
R/W:00000000
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Byte 2
Controller I/O Base Address (high mid.)
R/W:00000000
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Byte 1
Bit 7
Bit 6
Controller I/O Base Address (low mid.)
R/W:00000000
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 0
Controller I/O Base Address (low)
I/O Space Indicator
R/W:000000
R:01
This is the PCI I/O space base address for the Operation registers.
Bits 1:0 — I/O Space Indicator
These bits always read back ‘01’, indicating that this Base Address register defines a PCI I/O
space.
Bits 31:2 — Controller I/O Base Address
This field specifies the I/O-mapped register space of the CL-PD6833. The Operation registers
can be accessed through this window only after these bits are set to a non-zero value. The
allowable range is anywhere in the I/O map. For legacy software, this register should be set to
‘000003E1h’.
66
PCI CONFIGURATION REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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