CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
9.2.5
Card Memory Map 0–4 Offset Address Low
Register Name: Card Memory Map 0–4 Offset Address Low
I/O Index: 14h, 1Ch, 24h, 2Ch, 34h
Memory Offset: 814h, 81Ch, 824h, 82Ch, 834h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: socket
Register Compatibility Type: 365
Bit 2
Bit 1
Bit 0
Offset Address 19:12
R/W:00000000
There are five separate Card Memory Map Offset Address Low registers, each with identical fields.
These registers are located at the following indexes:
Index (Socket A)
14h
1Ch
24h
2Ch
34h
Register
Card Memory Map 0 Offset Address Low
Card Memory Map 1 Offset Address Low
Card Memory Map 2 Offset Address Low
Card Memory Map 3 Offset Address Low
Card Memory Map 4 Offset Address Low
Bits 7:0 — Offset Address 19:12
This register contains the least-significant byte of the quantity that is added to the system memory
address that determines where in the PC Card memory map the memory access occurs.
The most-significant six bits are located in the Card Memory Map 0–4 Offset Address High
register.
114
WINDOW MAPPING REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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