CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
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Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
The following information about I/O window mapping is important:
q The I/O Window Mapping registers determine where in the PCI I/O space and PC Card I/O space accesses
occur. On reset, there are two I/O windows that can be used independently.
q In addition, depending on the PC Card Space Control, PCI Space Control, and Window Type Select
registers, all mapping registers can be defined as I/O Window Mapping registers. This provides five
additional I/O windows that can be used independently. A total of seven I/O windows can be realized.
q All the I/O Window Mapping registers have dual functionality. The functions are determined by the PC Card
Space Control, PCI Space Control, and Window Type Select registers. At reset the Window Type Select
register is set to 00h. This configures the I/O and memory windows to be compatible with the CL-PD672X
products. When a bit in the Window Type Select register is set, the corresponding window can be
programmed using the PC Card Space Control and PCI Space Control registers to respond to I/O or
memory commands on the PCI bus and to present these cycles to the PC Card 16 socket as either memory
or I/O cycles. To facilitate this operation anytime, a bit is set in the Window Type Select register. The
attributes for Timer selection and the size of the data for a window are programmed in the Gen Map Extra
Control registers.
q The I/O windows are enabled and disabled using the Mapping Enable register (see page 101).
q To specify where in the PCI space an I/O window is mapped, start and end addresses are specified. An I/O
window is selected whenever the appropriate Gen Map Enable bit is set and the following conditions are true:
— The PCI address is greater than or equal to the appropriate Gen Map Start Address register.
— The PCI address is less than or equal to the appropriate Gen Map End Address register.
— The upper 16 bits of the PCI address are all ‘0’s.
q To specify where in the PCI space a memory window is mapped, start and end addresses are specified. A
memory window is selected whenever the appropriate Memory Map Enable bit is set and the following
conditions are true:
— The PCI address is greater than or equal to the appropriate System Memory Map Start Address
register (see page 110).
— The PCI address is less than or equal to the appropriate System Memory Map End Address register
(see page 112).
— The System Memory Map Upper Address register is equal to the upper PCI address.
— Start and end addresses are specified with PCI Address bits 31:12. This sets the minimum size of a
memory window to 4 Kbytes. Memory windows are specified in the PCI memory address space.
q To ensure proper operation, none of the I/O windows can overlap in the PCI address space.
q In this specification, references to I/O Window 0 pertain to Gen Map 5 and I/O Window 1 corresponds to Gen
Map 6. Memory Windows 0–4 correspond to Gen Map 0–4.
CAUTION: Be sure that the I/O windows do not map to the I/O Base Address register programmed at offset 44h
in the configuration space.
118
GENERAL WINDOW MAPPING REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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