CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
8.2 Interface Status
Register Name: Interface Status
I/O Index: 01h
Memory Offset: 801h
Bit 7
Bit 6
Bit 5
RDY
Bit 4
WP
Reserved
R:1 a
Card Power
On
R:0
Ready/Busy*
/ Intr. Request
status
Rb
Write Protect
Rc
Register Per: socket
Register Compatibility Type: 365
Bit 3
CD2#
Bit 2
CD1#
Card Detect
Rd
Bit 1
BVD2
Bit 0
BVD1
Battery Voltage Detect
Re
a Bit 7 always reads ‘1’ on the CL-PD6833.
b Bit 5 indicates the value of the RDY/IREQ# pin (see page 18) in PC Card 16 mode. In I/O card mode, this bit is used to identify
the source of interrupt request either from socket A or B. In I/O card mode, this bit always indicates the inverted state of the
RDY/BSY INTR# pin.
c Bit 4 indicates the value of the WP/IOIS16# pin (see page 18).
d Bits 3:2 indicate the inversion of the values of the CD1# and CD2# pins (see page 18).
e Bits 1:0 indicate the values of the BVD1/STSCHG#/RI# and BVD2/SPKR#/LED# pins (see page 19).
Bits 1:0 — Battery Voltage Detect
BVD2 Level BVD1 Level
Bit 1
Bit 0
PCMCIA Interpretation
Low
Low
High
High
Low
High
Low
High
0
0
Card data lost
0
1
Battery low warning
1
0
Card data lost
1
1
Battery/data okay
In Memory Card Interface mode, these bits are used by PC Card support software and firmware
to indicate the remaining capacity of the battery in the PC Cards. In I/O Card Interface mode, bit 0
indicates the state of the BVD1/STSCHG#/RI# pin (see page 20). Bit 1 status is not valid in I/O
Card Interface mode.
Bits 3:2 — Card Detect
CD2# Level CD1# Level
Bit 3
Bit 2
Card Detect Status
High
High
Low
Low
High
Low
High
Low
0
0
Either no card, or card is not fully inserted
0
1
Card is not fully inserted
1
0
Card is not fully inserted
1
1
Card is fully inserted
These bits indicate the state of the CD1# and CD2# pins (see page 18).
92
DEVICE CONTROL REGISTERS
ADVANCE DATA BOOK v0.3
June 1998
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