CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
Bit 4 — Compatibility Bit
Bit 5 — Card is I/O
0
Sets Memory Card Interface mode. The card socket is configured to support memory-only-type cards.
All dual-function socket interface pins are defined to perform memory-only-type interface functions.
1
Sets I/O Card Interface mode. The card socket is configured to support combined I/O-and-memory-
type cards. All dual-function socket interface pins are defined to perform all I/O and basic memory type
interface functions.
This bit determines how dual-function socket interface pins are used. For more information on spe-
cific pins, refer to Table 2-2 on page 15.
Bit 6 — Card Reset*
0
The RESET signal to the card socket is set active (high for normal, low for ATA mode).
1
The RESET signal to the card socket is set inactive (low for normal, high for ATA mode).
This bit determines whether the RESET signal (see page 19) to the card is active or inactive.
When the Card Enable bit (see page 95) is ‘0’, the RESET signal to the card is high-impedance.
See Chapter 14, “ATA MODE OPERATION” for further description of ATA mode functions.
Bit 7 — Ring Indicate Enable
0
BVD1/STSCHG#/RI# pin is status change function.
1
BVD1/STSCHG#/RI# pin is ring indicate input pin from card.
In R2 I/O Card Interface mode, this bit allows the BVD1/STSCHG#/RI# pin to be programmed as
an active-low RING indicate input. When this bit is set to ‘1’, the level on this input passes through
to the PME# output.
June 1998
ADVANCE DATA BOOK v0.3
97
DEVICE CONTROL REGISTERS
Share Link: 
