CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
Bits 1:0 — VPP1 Power
Bit 1
Bit 0
VPP_PGM
VPP_VCC
PC Card Intended Socket Function
0
0
Inactive (low)
Inactive (low) 0 V to PC Card socket VPP1 pin
0
1
Inactive (low)
Active (high) a Selected card VCC to PC Card socket VPP1 pin
1
0
Active (high) a
Inactive (low) +12 V to PC Card socket VPP1 pin
1
1
Inactive (low)
Inactive (low) 0 V to PC Card socket VPP1 pin
a This state exists under conditions where VPP1 power is activated. See Table 8-2.
These bits control the power to the VPP1 pin of the PC Card.
Bits 3:2 — Compatibility Bits
Bit 4 — VCC Power
0
1
Power is not applied to the card.
Power is applied to the card, if CD2# and CD1# are active low, then the selected VCC voltage is
applied.
Setting this bit to ‘1’ applies power to the card. The VCC 3.3-V bit (see page 132) determines
whether 3.3 V or 5 V power is applied. Note that this bit is reset to ‘0’ when a card is removed from
the socket. This bit is locked by the VCC Power Lock bit (bit 0 of the Extension Control 1 register,
memory offset 903h).
Bit 5 — Reserved
Bit 6 — Compatibility Bit
Bit 7 — Card Enable
0
Outputs to the card socket are not enabled and are floating.
1
Outputs to the card socket are enabled if CD1# and CD2# are active low and bit 4 is ‘1’.
This bit only applies to R2 cards. When this bit is ‘1’, the outputs to the PC Card are enabled if a
card is present and card power is being supplied. The pins affected include CE2#, CE1#, IORD#,
IOWR#, OE#, REG#, RESET, A[25:0], D[15:0], and WE#.
June 1998
ADVANCE DATA BOOK v0.3
95
DEVICE CONTROL REGISTERS
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