CL-PS6700
Low-Power PC Card Controller
4.6 I/O Properties
Table 4-2 on page 32 summarizes the CL-PS6700 signals.
Conventions for Table 4-2
Acronym Definition
Assert
H
Voltage high
L
Voltage low
Type
O
Output
I
Input
I/O
Bidirectional signal
Power Group
sys
System
pcm PCMCIA
VDDhi VDD_HI pin
Synchronous Signal a
S
Synchronous signal
A
Asynchronous signal
Resistor
PU
Pull-up resistor
PD
Pull-down resistor
Reset, Standby, Card Power Off, Idle b
T
Output in high-impedance
A
Normally operating output; can be high, low, or high-impedance.
PO
The state of an output during the deep Standby state is programmable, either low or high.
PI
Protected input; that is, the internal input buffer is de-coupled from the pin.
N
Normally operating input
a Synchronous signal indicates whether a signal is synchronous to PCLK.
b These indicate the state of each output signal or the input pin during various states of the device.
For Reset, Table 4-2 on page 32 indicates the state of each signal when RESET_L is asserted and power sta-
bilizes.
November 1997
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
31
REGISTERS