Bell 212A / V.22 Modem with Call Progress and DTMF
12
CMX644A Preliminary Information
4.3.2.4 GAIN BLOCKS Register ($E2)
Bits 0 to 3 (RG0 to RG3) control the levels of the receiver input gain block according to the following table:
RG3 (Bit 3)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
RG2 (Bit 2)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
RG1 (Bit 1)
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
RG0 (Bit 0)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GAIN (dB)
-4.70
-3.46
-2.12
-0.96
0.00
0.87
1.64
2.36
3.08
3.69
4.22
4.76
5.27
5.78
6.21
6.58
Table 11: GAIN BLOCKS Register ($E2)
The gain should be set in a calibration procedure in order to trim out the effects of any component tolerances
which may give rise to a variation in the Carrier Detect Threshold levels.
Bits 4 to 7 (TG0 to TG3) control the levels of the transmit path gain block according to the following table:
TG3 (Bit 7)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TG2 (Bit 6)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TG1 (Bit 5)
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TG0 (Bit 4)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GAIN (dB)
OFF (output at Bias)
-5.6
-5.2
-4.8
-4.4
-4.0
-3.6
-3.2
-2.8
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
0.0
Table 12: Control Levels for the Tx path gain block
2000 MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. # 20480197.006
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