CMX644AD2 View Datasheet(PDF) - MX-COM Inc
Part Name
Description
MFG CO.
'CMX644AD2' PDF : 31 Pages View PDF
Bell 212A / V.22 Modem with Call Progress and DTMF
16
4.3.2.9 IRQ MASK BITS ($EE)
This register is used to control the interrupts (IRQs) as described below:
CMX644A Preliminary Information
RX PARITY mask
(Bit 7)
RING DETECT mask
(Bit 6)
DETECT mask
(Bit 5)
RX DATA OVERFLOW
mask (Bit 4)
RX DATA READY mask
(Bit 3)
TX DATA UNDERFLOW
mask (Bit 2)
TX DATA READY mask
(Bit 1)
UNSCRAM MARK mask
(Bit 0)
When this bit is set to ‘1’ it enables an interrupt that occurs when the RX
PARITY flag (Bit 7, FLAGS Register, $EF) changes from ‘0’ to ‘1’ i.e. there is an
RX PARITY error. When this bit is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when RING
DETECT CHANGE flag (Bit 6, FLAGS Register, $EF) changes from ‘0’ to ‘1’.
When this bit is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when DETECT flag
(Bit 5, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When this bit is ‘0’ the
interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when RX DATA
OVERFLOW flag (Bit 4, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When
this bit is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when RX DATA
READY flag (Bit 3, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When this bit
is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when TX DATA
UNDERFLOW flag (Bit 2, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When
this bit is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when TX DATA
READY flag (Bit 1, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When this bit
is ‘0’ the interrupt is masked.
When this bit is set to ‘1’ it enables an interrupt that occurs when UNSCRAM
MARK flag (Bit 0, FLAGS Register, $EF) changes from ‘0’ to ‘1’. When this bit
is ‘0’ the interrupt is masked.
Table 20: IRQ MASK BITS ($EE)
4.3.3 Read Only ‘C-BUS’ Registers
REGISTER
NAME
RX DATA
BYTE
HEX
ADDRESS/
COMMAND
$EA
BIT 7
(D7)
D7
BIT 6
(D6)
D6
TONES
DETECT
$EC
1
RING
DETECT
FLAGS
$EF
RX
PARITY
RING
DETECT
CHANGE
BIT 5
(D5)
D5
CALL
PRGRSS
DETECT
DETECT
BIT 4
(D4)
D4
CARRIER
DETECT
RX DATA
OVER-
FLOW
BIT 3
(D3)
BIT 2
(D2)
D3
D2
ANSWER
DETECT
0
RX
DATA
READY
TX DATA
UNDER-
FLOW
Table 21: Read Only 'C-BUS' Registers
BIT 1
(D1)
D1
0
TX
DATA
READY
BIT 0
(D0)
D0
UN-SCRAM
MARK
DETECT
UN-SCRAM
MARK
2000 MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. # 20480197.006
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.
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