D950-CORE View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'D950-CORE' PDF : 89 Pages View PDF
D950-Core
4.4 General Purpose P-Port
4.4.1 Introduction
The P-Port is an 8-bit (P0/P7) general purpose parallel port in which each port pin can be
individually programmed as input (level or falling edge sensitive) or output.1
The data direction and sensitivity for each bit are programmed through PCDR and PCSR 8-bit
registers.
Port inputs are sampled on each INCYCLE rising edge. Detection of a level change is
performed, provided the input remains at the same level for at least one INCYCLE cycle.2
The Port input data is stored into the 8-bit Port Input Register (PIR). The Port output data is
stored into the 8-bit Port Output Register (POR).3
Figure 4.13 D950-Core Parallel I/O Port
PORT CONDITION
TO P.C.U.
PORT INPUT
REG. (PIR)
FALLING EDGE
DETECTION
LEVEL
DETECTION
EDGE/LEVEL
SENSITIVITY
16
YD
PORT OUTPUT
REG. (POR)
8
P0 / P7
PORT CONTROL
DIRECTION REG.
(PCDR)
8
P_EN
PORT CONTROL
SENSITIVITY
REG. (PCSR)
Notes 1: PPort can be used as a branch condition.
2: PIR value is set to 1 on falling edge detection,until the port is tested.
3: The significant bit are 8-LSBs (8-MSBs=undefined when reading).
VR02017N
32/89
5
Share Link: 
