D950-CORE View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'D950-CORE' PDF : 89 Pages View PDF
D950-Core
4.5 Common Control Registers
4.5.1 STA: Status register
STA is a 16-bit status register shared by both the DCU, the ACU and the PCU.
Bits 0 to 7 are dedicated to DCU which defines the calculation mode for certain instructions
and specifies the type of operands to be used. Bits 8 to 13 are dedicated to the ACU which
initializes circular and bit-reverse addressing modes. Bits 14 and 15 are dedicated to the PCU
which controls interrupts.
After reset, STA default value is 0x004C.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EI IPE RX1 RX0 MY1 MY0 MX1 MX0 RND ES SAT I SR SL LR LL
PCU
ACU
DCU
EI: Enable Interrupt
0: Interrupt is disabled (def.)
1: Interrupt is enabled
IPE: Interrupt Pending: Set and reset by software only using the bit manipulation instruc-
tion.
0: Reset by hardware when the interrupt is acknowledged (def.)
1: Set by hardware when the trigger event occurs or by the programmer to generate
an interrupt.
RX1: Bit reverse addressing mode for AX1
0: No bit reverse addressing mode for AX1 (def.)
1: Bit reverse addressing mode is selected for AX1
RX0: Bit reverse addressing mode for AX0
0: No bit reverse addressing mode for AX0 (def.)
1: Bit reverse addressing mode is selected for AX0
MY1: Modulo addressing mode for AY1
0: No modulo addressing mode for AY1 (def.)
1: Modulo addressing mode is selected for AY1. AY1 is updated through the Y-
memory space modulo logic.
MY0: Modulo addressing mode for AY0
0: No modulo addressing mode for AY0 (def.)
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