DSM2180F3
to use 10 kΩ pull-up resistors to VCC on all JTAG-
ISP signals on your circuit board.
Initial Delivery State
When delivered from ST, the device has all bits in
the memory and PLDs erased to logic 1. The DSM
Configuration Register bits are set to 0. The code,
configuration, and PLD logic are loaded using the
programming procedure. The four basic JTAG ISP
signals (TCK, TMS, TDI, TDO) are ready for ISP
function.
Obsolete Product(s) - Obsolete Product(s)
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