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DSM2180F3 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'DSM2180F3' PDF : 63 Pages View PDF
DSM2180F3
Table 27. CPLD Combinatorial Timing
Symbol
Parameter
Conditions
-90
Min
Max
Fast PT
Alloc
Turbo
Off
Slew
Rate1 Unit
tPD
CPLD Input Pin/Feedback to
CPLD Combinatorial Output
25
Add 2 Add 10 Sub 2 ns
tEA
CPLD Input to CPLD Output
Enable
26
Add 10 Sub 2 ns
tER
CPLD Input to CPLD Output
Disable
26
Add 10 Sub 2 ns
tARP
CPLD Register Clear or Preset
Delay
26
Add 10 Sub 2 ns
tARPW
CPLD Register Clear or Preset
Pulse Width
20
Add 10
ns
tARD
CPLD Array Delay
Any Macrocell
16
Add 2
ns
Obsolete Product(s) - Obsolete Product(s) Note: 1. Fast Slew Rate output available on PB3-PB0, and PD2-PD0.
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