EDI9LC644V2012BC View Datasheet(PDF) - White Electronic Designs Corporation
Part Name
Description
MFG CO.
'EDI9LC644V2012BC' PDF : 25 Pages View PDF
EDI9LC644V
FIG. 10 SDRAM PAGE WRITE CYCLE AT DIFFERENT BANK @ BURST LENGTH = 4
Notes:
1. To interrupt burst write by Row precharge, BWE should be asserted to mask invalid input data.
2. To interrupt a burst read by Row precharge, both the read and the precharge banks must be the same.
17
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
Share Link: 
