EVAL-ADUM4160EBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-ADUM4160EBZ' PDF : 16 Pages View PDF
ADuM3160
Data Sheet
Table 10. Truth Table, Control Signals, and Power (Positive Logic)
VSPU
Input1
VUD+, VUD− VBUS1, VDD1
State1
State
VBUS2, VDD2
State
VDD+, VDD− VPIN
State1
Input1
High
Active
Powered Powered Active
High
Low
Active
Powered Powered Active
High
Low
Active
Powered Powered Active
High
High
Active
Powered Powered Active
High
X
Z
Powered Powered Z
Low
X
X
Unpowered Powered Z
X
X
Z
Powered Unpowered X
X
1 X is don’t care; Z is the high impedance output state.
VSPD
Input1
High
Low
High
Low
X
X
X
Description
Input and output logic set for full speed logic
convention and timing.
Input and output logic set for low speed logic
convention and timing.
Not allowed. VSPU and VSPD must be set to the same
value. The USB host detects a communication error.
Not allowed. VSPU and VSPD must be set to the same
value. The USB host detects a communication error.
Upstream Side 1 presents a disconnected state to
the USB cable.
When power is not present on VDD1, the down-
stream data output drivers revert to the high-Z
state within 32 bit times. The downstream side
initializes in the high-Z state.
When power is not present on VDD2, the upstream
side disconnects the pull-up and disables the
upstream drivers within 32 bit times.
Rev. C | Page 8 of 16
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