HT48CXX/HT48RXX
Instruction Set Summary
Mnemonic
Description
Flag Affected
Instruction
Cycle
Arithmetic
ADD A,[m] Add data memory to ACC
ADDM A,[m] Add ACC to data memory
Z,C,AC,OV
1
Z,C,AC,OV
1(1)
ADD A,x
Add immediate data to ACC
Z,C,AC,OV
1
ADC A,[m]
Add data memory to ACC with carry
ADCM A,[m] Add ACC to register with carry
Z,C,AC,OV
1
Z,C,AC,OV
1(1)
SUB A,x
Subtract immediate data from ACC
Z,C,AC,OV
1
SUB A,[m]
Subtract data memory from ACC
Z,C,AC,OV
1
SUBM A,[m] Subtract data memory from ACC with result in Z,C,AC,OV
1(1)
data memory
SBC A,[m]
Subtract data memory from ACC with carry
Z,C,AC,OV
1
SBCM A,[m] Subtract data memory from ACC with carry with Z,C,AC,OV
1(1)
result in data memory
DAA [m]
Decimal adjust ACC for addition with result in
C
1(1)
data memory
Logic
Operation
AND A,[m] AND data memory to ACC
Z
1
OR A,[m]
OR data memory to ACC
Z
1
XOR A,[m]
ANDM A,[m]
ORM A,[m]
XORM A,[m]
Exclusive-OR data memory to ACC
AND ACC to data memory
OR ACC to data memory
Exclusive-OR ACC to data memory
Z
1
Z
1(1)
Z
1(1)
Z
1(1)
AND A,x
AND immediate data to ACC
Z
1
OR A,x
OR immediate data to ACC
Z
1
XOR A,x
CPL [m]
Exclusive-OR immediate data to ACC
Complement data memory
Z
1
Z
1(1)
CPLA [m]
Complement data memory with result in ACC
Z
1
Increment &
Decrement
INCA [m]
Increment data memory with result in ACC
Z
1
INC [m]
Increment data memory
Z
1(1)
DECA [m]
Decrement data memory with result in ACC
Z
1
DEC [m]
Decrement data memory
Z
1(1)
29
25th May ’99