HT48R065G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R065G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
Examination of the pin names on the package diagrams will reveal that some pin function names are
repeated, this indicates a function pin that can be remapped to other port pins. If the pin name is
bracketed, then this indicates its alternative location. Pin name without brackets indicates its default
location which is the condition after Power-on.
PCFG [1:0] Bit
Pin Mapping
PCFG [1:0] Bits Status
00
01
10
PFD/PA1
TC0/PA2
INT/PA3
TC1/PA4
PFD/PC5
TC0/PC4
INT/PC3
TC1/PC2
PFD/PB0
TC0/PB1
INT/PB2
TC1/PB3
11
PFD/PE0
TC0/PE1
INT/PE2
TC1/PE3
Pin Remapping
I/O Pin Structures
The diagrams illustrate the I/O pin internal structures. As the exact logical construction of the I/O pin
may differ from these drawings, they are supplied as a guide only to assist with the functional
understanding of the I/O pins.
Programming Considerations
Within the user program, one of the first things to consider is port initialisation. After a reset, the I/O
data register and I/O port control register will be set high. This means that all I/O pins will default to an
input state, the level of which depends on the other connected circuitry and whether pull-high options
have been selected. If the port control registers, are then programmed to setup some pins as outputs,
these output pins will have an initial high output value unless the associated port data register is first
programmed. Selecting which pins are inputs and which are outputs can be achieved byte-wide by
loading the correct value into the port control register or by programming individual bits in the port
control register using the ²SET [m].i² and ²CLR [m].i² instructions. Note that when using these bit
control instructions, a read-modify-write operation takes place. The microcontroller must first read in
the data on the entire port, modify it to the required new bit values and then rewrite this data back to the
output ports.
S y s te m C lo c k
T1
T2
T3
T4
T1
T2
T3
T4
P o rt D a ta
R e a d fro m P o rt
W r ite to P o r t
Read Modify Write Timing
Pins on PA0 to PA7 for all the devices or PC0 to PC7 for only the HT48R0662G device each have a
wake-up function, selected via the PAWK or PCWK register. When the device is in the Idle/Sleep
Mode, various methods are available to wake the device up. One of these is a high to low transition of
any of these pins. Single or multiple pins on Port A or Port C can be setup to have this function.
Rev. 1.10
55
October 23, 2012
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