HT48R065G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R065G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
PW M C0
PW M C1
P W M C o n tro l
P W M 0,P W M 1
T0S
fS Y S
0
M UX
fT P
fL X T
1
T 0 P S C [2 :0 ]
T 2 P S C [2 :0 ]
T im e - B a s e C o n tr o l
7 S ta g e C o u n te r
7
8 -1 M U X
7
8 -1 M U X
T im e - B a s e e v e n t in te r r u p t P e r io d
(2 10 ~
213 )*
1
fT P
T o T im e r 0 in te r n a l c lo c k
(fT 0 C K = fT P ~ fT P /1 2 8 )
T o T im e r 2 in te r n a l c lo c k
(fT 2 C K = fT P ~ fT P /1 2 8 )
T im e r P r e s c a le r
Clock Structure for Timer/PWM/Time Base
T im e r 0 In te r n a l C lo c k
(fT P )
T0M 1,T0M 0
M o d e C o n tro l
D a ta B u s
P r e lo a d R e g is te r
T0O V
TC 0
M UX
CX
TM R 0S T0E G
U p C o u n te r
O v e r flo w
to In te rru p t
T0O N
¸2
PFD 0
8-bit Timer/Event Counter 0 Structure
fS Y S /4
L X T O s c illa to r
M
U
X
T1S
TC 1
T1E G
T1M 1,T1M 0
D a ta B u s
P r e lo a d R e g is te r
M o d e C o n tro l
U p C o u n te r
T1O N
8-bit Timer/Event Counter 1 Structure
T1O V
O v e r flo w
to In te rru p t
¸2
PFD 1
PFD C S
PFD 0
PFD 1
0
M UX
1
P F D o u tp u t
HT48R0662G PFD Clock Source
Note: If PWM0/PWM1 is enabled, then fTP comes from fSYS and the T0S bit will have no effect.
Rev. 1.10
58
October 23, 2012
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