HT49RA1/HT49CA1
Program Counter Low Register - PCL
To provide additional program control functions, the low
byte of the Program Counter is made accessible to pro-
grammers by locating it within the Special Purpose area
of the Data Memory. By manipulating this register, direct
jumps to other program locations are easily imple-
mented. Loading a value directly into this PCL register
will cause a jump to the specified Program Memory lo-
cation, however, as the register is only 8-bit wide, only
jumps within the current Program Memory page are per-
mitted. When such operations are used, note that a
dummy cycle will be inserted.
Look-up Table Registers - TBLP, TBLH
These two special function registers are used to control
operation of the look-up table which is stored in the Pro-
gram Memory. TBLP is the table pointer and indicates
the location where the table data is located. Its value
must be setup before any table read commands are ex-
ecuted. Its value can be changed, for example using the
²INC² or ²DEC² instructions, allowing for easy table data
pointing and reading. TBLH is the location where the
high order byte of the table data is stored after a table
read data instruction has been executed. Note that the
lower order table data byte is transferred to a user de-
fined location.
Status Register - STATUS
This 8-bit register contains the zero flag (Z), carry flag
(C), auxiliary carry flag (AC), overflow flag (OV), power
down flag (PDF), and watchdog time-out flag (TO).
These arithmetic/logical operation and system manage-
ment flags are used to record the status and operation of
the microcontroller.
With the exception of the TO and PDF flags, bits in the
status register can be altered by instructions like most
other registers. Any data written into the status register
will not change the TO or PDF flag. In addition, opera-
tions related to the status register may give different re-
sults due to the different instruction operations. The TO
flag can be affected only by a system power-up, a WDT
time-out or by executing the ²CLR WDT² or ²HALT² in-
struction. The PDF flag is affected only by executing the
²HALT² or ²CLR WDT² instruction or during a system
power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
¨ C is set if an operation results in a carry during an
addition operation or if a borrow does not take place
during a subtraction operation; otherwise C is
cleared. C is also affected by a rotate through carry
instruction.
¨ AC is set if an operation results in a carry out of the
low nibbles in addition, or no borrow from the high
nibble into the low nibble in subtraction; otherwise
AC is cleared.
¨ Z is set if the result of an arithmetic or logical opera-
tion is zero; otherwise Z is cleared.
¨ OV is set if an operation results in a carry into the
highest-order bit but not a carry out of the high-
est-order bit, or vice versa; otherwise OV is cleared.
¨ PDF is cleared by a system power-up or executing
the ²CLR WDT² instruction. PDF is set by executing
the ²HALT² instruction.
¨ TO is cleared by a system power-up or executing
the ²CLR WDT² or ²HALT² instruction. TO is set by
a WDT time-out.
In addition, on entering an interrupt sequence or execut-
ing a subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status registers are important and if the subroutine
can corrupt the status register, precautions must be
taken to correctly save it.
Real Time Clock Control Register - RTCC
The RTCC register controls two internal functions one of
which is the Real Time Clock (RTC) interrupt, whose
function is to provide an internal interrupt signal at regu-
lar fixed intervals. The driving clock for the RTC interrupt
comes from the internal clock source, known as fS,
which is then further divided to give longer time values,
which in turn generates the interrupt signal. The value of
this division ratio is determined by the value pro-
grammed into bits 2~0, known as RT2~RT0, of the
RTCC register. By writing a value directly into these
b7
b0
T O P D F O V Z A C C S T A T U S R e g is te r
A r ith m e tic /L o g ic O
C a r r y fla g
A u x ilia r y c a r r y fla g
Z e r o fla g
O v e r flo w fla g
p e r a tio n
F la g s
S y s te m M a n a g e m e n t F la g s
P o w e r d o w n fla g
W a tc h d o g tim e - o u t fla g
N o t im p le m e n te d , r e a d a s " 0 "
Status Register
Rev. 1.10
13
March 30, 2014