HT49CA1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49CA1' PDF : 58 Pages View PDF
HT49RA1/HT49CA1
D a ta B u s
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
REM 1
R e a d D a ta R e g is te r
V DD
C o n tr o l B it
DQ
CK Q
S
P u ll- H ig h
O p tio n
D a ta B it
DQ
CK Q
S
M
U
X
M
P C 0 /R E M S e le c t
U
X
PC0 Input/Output Port
P C 0 /R E M
I/O Port Control Registers
The register PCC is used to control the input/output con-
figuration of port PC. With this control register, this sin-
gle CMOS output or input with or without pull-high
resistor structures can be reconfigured dynamically un-
der software control. The pin of the Port C I/O port is di-
rectly mapped to a bit in its associated PCC port control
register. For the I/O pin to function as an input, the corre-
sponding bit of the control register must be written as a
²1². This will then allow the logic state of the input pin to
be directly read by instructions. When the correspond-
ing bit of the control register is written as a ²0², the I/O
pin will be setup as a CMOS output. If the pin is currently
setup as an output, instructions can still be used to read
the output register. However, it should be noted that the
program will in fact only read the status of the output
data latch and not the actual logic status of the output
pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
· External Interrupt Input
The external interrupt pin INT0 or INT1 are pin-shared
with the I/O pin PB0 or PB1. For applications not re-
quiring an external interrupt input, the pin-shared ex-
ternal interrupt pin can be used as a normal I/O pin,
however to do this, the external interrupt enable bits in
the INTC0 register must be disabled.
· External Timer Clock Input
The external timer pin TMR0 or TMR1 are pin-shared
with the I/O pin PB2 or PB3. To configure it to operate
as a timer input, the corresponding control bits in the
timer control register must be correctly set. For appli-
cations that do not require an external timer input, the
pin can be used as a normal I/O pin. Note that if used
as a normal I/O pin the timer mode control bits in the
timer control register must select the timer mode,
which has an internal clock source, to prevent the in-
put pin from interfering with the timer operation.
I/O Pin Structures
The following diagrams illustrate the I/O pin internal
structures. As the exact logical construction of the I/O
pin may differ from these drawings, they are supplied as
a guide only to assist with the functional understanding
of the I/O pins.
Programming Considerations
Within the application program, one of the first things to
consider is port initialization. After a reset,the I/O port
registers will be set high. It is important to note that for
the NMOS types, when set high the output NMOS tran-
sistor will be placed into a high impedance condition, al-
lowing the pin to be used also as an input. The
generation of a high level on the NMOS outputs there-
fore is reliant upon externally connected circuitry and
the pull-high resistor.
S y s te m C lo c k
T1
T2
T3
T4
T1
T2
T3
T4
P o rt D a ta
W r ite to P o r t
R e a d fro m P o rt
Read/Write Timing
Rev. 1.10
16
March 30, 2014
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