HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
· TM0C1 Register
Bit
Name
R/W
POR
7
T0M1
R/W
0
6
T0M0
R/W
0
5
T0IO1
R/W
0
4
T0IO0
R/W
0
3
T0OC
R/W
0
2
T0POL
R/W
0
1
T0DPX
R/W
0
0
T0CCLR
R/W
0
Bit 7~6
Bit 5~4
Bit 3
T0M1~T0M0: select TM0 operating mode
00: compare match output mode
01: undefined
10: PWM mode
11: Timer/Counter mode
These bits setup the required operating mode for the TM. To ensure reliable operation the TM
should be switched off before any changes are made to the T0M1 and T0M0 bits. In the
Timer/Counter Mode, the TM output pin control must be disabled.
T0IO1~T0IO0: Select TP0 output function
compare match output mode
00: no change
01: output low
10: output high
11: toggle output
PWM Mode
00: PWM output inactive state
01: PWM output active state
10: PWM output
11: Undefined
Timer/Counter mode
unused
These two bits are used to determine how the TM output pin changes state when a certain
condition is reached. The function that these bits select depends upon in which mode the TM is
running.
In the Compare Match Output Mode, the T0IO1 and T0IO0 bits determine how the TM output
pin changes state when a compare match occurs from the Comparator A. The TM output pin can
be setup to switch high, switch low or to toggle its present state when a compare match occurs
from the Comparator A. When the bits are both zero, then no change will take place on the
output. The initial value of the TM output pin should be setup using the T0OC bit in the TM0C1
register. Note that the output level requested by the T0IO1 and T0IO0 bits must be different from
the initial value setup using the T0OC bit otherwise no change will occur on the TM output pin
when a compare match occurs. After the TM output pin changes state it can be reset to its initial
level by changing the level of the T0ON bit from low to high.
In the PWM Mode, the T0IO1 and T0IO0 bits determine how the TM output pin changes state
when a certain compare match condition occurs. The PWM output function is modified by
changing these two bits. It is necessary to change the values of the T0IO1 and T0IO0 bits only
after the TMn has been switched off. Unpredictable PWM outputs will occur if the T0IO1 and
T0IO0 bits are changed when the TM is running
T0OC: TP0 output control bit
compare match output mode
0: initial low
1: initial high
PWM mode
0: active low
1: active high
This is the output control bit for the TM output pin. Its operation depends upon whether TM is
being used in the Compare Match Output Mode or in the PWM Mode. It has no effect if the TM is
in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of
the TM output pin before a compare match occurs. In the PWM Mode it determines if the PWM
signal is active high or active low.
Rev. 1.40
56
November 22, 2016