HT66F25D View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F25D' PDF : 177 Pages View PDF
A/D Flash Type 8-bit MCU with EEPROM
HT66F24D/HT66F25D
Bit 1
Bit 0
LRF: LVR Control register software reset flag
0: Not occur
1: Occurred
This bit is set to 1 if the LVRC register contains any non defined LVR voltage register
values. This in effect acts like a software reset function. This bit can only be cleared to
0 by the application program.
WRF: WDT Control register software reset flag
0: Not occur
1: Occurred
This bit is set to 1 by the WDT Control register software reset and cleared by the
application program. Note that this bit can only be cleared to 0 by the application
program.
Fast Wake-up
To minimise power consumption the device can enter the SLEEP or IDLE0 Mode, where the system
clock source to the device will be stopped. However when the device is woken up again, it can take
a considerable time for the original system oscillator to restart, stabilise and allow normal operation
to resume. To ensure the device is up and running as fast as possible a Fast Wake-up function is
provided, which allows fSUB, namely either the LXT or LIRC oscillator, to act as a temporary clock
to first drive the system until the original system oscillator has stabilised. As the clock source for
the Fast Wake-up function is fSUB, the Fast Wake-up function is only available in the SLEEP1 and
IDLE0 modes. When the device is woken up from the SLEEP0 mode, the Fast Wake-up function has
no effect because the fSUB clock is stopped. The Fast Wake-up enable/disable function is controlled
using the FSTEN bit in the SMOD register.
If the HXT oscillator is selected as the NORMAL Mode system clock and the Fast Wake-up function
is enabled, then it will take one to two tSUB clock cycles of the LIRC or LXT oscillator for the system
to wake-up. The system will then initially run under the fSUB clock source until 128 HXT clock
cycles have elapsed, at which point the HTO flag will switch high and the system will switch over to
operating from the HXT oscillator.
If the HIRC oscillators or LIRC oscillator is used as the system oscillator then it will take 15~16
clock cycles of the HIRC or 1~2 cycles of the LIRC oscillator to wake up the system from the
SLEEP or IDLE0 Mode. The Fast Wake-up bit, FSTEN will have no effect in these cases.
System FSTEN
Oscillator Bit
Wake-up Time
(SLEEP0 Mode)
Wake-up Time
(SLEEP1 Mode)
Wake-up Time
(IDLE0 Mode)
Wake-up Time
(IDLE1 Mode)
HXT
HIRC
LIRC
LXT
0 128 HXT cycles
128 HXT cycles
1~2 HXT cycles
1 128 HXT cycles
1~2 fSUB cycles
(System runs first with fSUB for 128 HXT
cycles and then switches over to run with the
1~2 HXT cycles
HXT clock)
X 15~16 HIRC cycles 15~16 HIRC cycles
1~2 HIRC cycles
X 1~2 LIRC cycles
1~2 LIRC cycles
1~2 LIRC cycles
X 128 LXT cycles
128 LXT cycles
1~2 LXT cycles
Wake-up Times
“X”: don’t care
Note that if the Watchdog Timer is disabled, which means that the LIRC oscillator is off, then there
will be no Fast Wake-up function available when the device wakes-up from the SLEEP0 Mode.
Rev. 1.10
44
March 25, 2013
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