HT66F25D View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F25D' PDF : 177 Pages View PDF
A/D Flash Type 8-bit MCU with EEPROM
HT66F24D/HT66F25D
If the device is woken up from the SLEEP1 Mode to NORMAL Mode, and the system clock source
is from the HXT oscillator and the FSTEN bit is set to 1, the system clock can first be switched to
the LXT or LIRC oscillator after wake up.
There are peripheral functions, such as WDT and TMs, for which the fSYS is used. If the system
clock source is switched from fH to fL, the clock source to the peripheral functions mentioned above
will change accordingly.
The on/off condition of fSUB and fS depends upon whether the WDT is enabled or disabled as the fSUB
clock source is selected from fLIRC.
Watchdog Timer
The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to
unknown locations, due to certain uncontrollable external events such as electrical noise.
Watchdog Timer Clock Source
The Watchdog Timer clock source is provided by the internal clock, fS, which is in turn supplied by
the LIRC oscillator. The LIRC internal oscillator has an approximate period of 32 kHz at a supply
voltage of 5V. However, it should be noted that this specified internal clock period can vary with
VDD, temperature and process variations. The Watchdog Timer source clock is then subdivided by
a ratio of 28 to 218 to give longer timeouts, the actual value being chosen using the WS2~WS0 bits in
the WDTC register.
Watchdog Timer Control Register
A single register, WDTC, controls the required timeout period as well as the enable/disable
operation. This register together with several configuration options control the overall operation of
the Watchdog Timer.
WDTC Register
Bit
7
Name
WE4
R/W
R/W
POR
0
6
WE3
R/W
1
5
WE2
R/W
0
4
WE1
R/W
1
3
WE0
R/W
0
2
WS2
R/W
0
1
WS1
R/W
1
0
WS0
R/W
1
Bit 7~3
WE4~WE0: WDT function software control
If the WDT configuration option is “always enable”:
10101 or 01010: Enabled
Other: Reset MCU
If the WDT configuration option is “controlled by the WDT control register”:
10101: Disabled
01010: Enabled
Other: Reset MCU
When these bits are changed by the environmental noise to reset the microcontroller,
the reset operation will be activated after 2~3 LIRC clock cycles and the WRF bit in
the CTRL register will be set to 1.
Rev. 1.10
50
March 25, 2013
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