ICS1893CY-10LF View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS1893CY-10LF' PDF : 143 Pages View PDF
ICS1893CY-10 - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-4. Configuration Pins (Continued)
Pin
Name
DPXSEL
HW/SW
LOCK
LSTA
MII/SI
NOD/REP
Pin
Pin
Number Type
Pin Description
24 Input or Half-Duplex / Full-Duplex Select.
Output The ‘Pin Type’ for this pin depends on the setting for the HW/SW pin
(pin 23). When the HW/SW pin is set for:
• Hardware mode, this pin acts as an input. In this case, when the
signal on this pin is logic:
– Low, this pin selects half-duplex operations.
– High, this pin selects full-duplex operations.
• Software mode, this pin acts as an output that indicates the current
status of this pin. In this case, when the signal on this pin is logic:
– Low, this pin indicates that it is set for half-duplex operations.
– High, this pin indicates that it is set for full-duplex operations.
23
Input Hardware/Software (Select).
When the signal on this pin is logic:
• Low, this pin selects Hardware mode operations.
• High, this pin selects Software mode operations.
27
Output (Stream Cipher) Lock (Acquired).
When the signal on this pin is logic:
• Low, the ICS1893CY-10 does not have a lock on the data stream.
• High, the ICS1893CY-10 has a lock on the data stream.
21
Output Link Status.
This pin is used to report the status of the link segment. When the
signal on this pin is logic:
• Low, there is no link established.
• High, there is a link established.
19
Input Media Independent Interface / Stream Interface (Select).
This pin is used in combination with the 10/100SEL pin to configure
the ICS1893CY-10 MAC/Repeater Interface. When the signal on this
pin is logic:
• Low, this pin configures the MAC/Repeater Interface as a Media
Independent Interface.
• High, this pin configures the MAC/Repeater Interface as a Stream
Interface in 100Base-TX or Serial Interface in 10Base-T.
1
Input Node/Repeater (Select).
This selection on this pin affects both the SQE test and the Carrier
Sense (CSR) signal. When the signal on this pin is logic:
• Low, this pin enables the ICS1893CY-10 to default to node
operations.
• High, this pin enables the ICS1893CY-10 to default to repeater
operations.
ICS1893CY-10 Rev 1/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
105
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