ICS1893CY-10LF View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS1893CY-10LF' PDF : 143 Pages View PDF
ICS1893CY-10 Data Sheet - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-5. MAC/Repeater Interface Pins: Media Independent Interface (MII) (Continued)
Pin
Name
TXEN
Pin
Number
44
Pin
Type
Input
Pin Description
Transmit Enable.
In MII mode:
• The ICS1893CY-10 samples its TXEN signal to determine when data
is available for transmission. When TXEN is asserted, the
ICS1893CY-10 begins sampling the data nibbles on the transmit data
lines TXD[3:0] synchronously with TXCLK. The ICS1893CY-10 then
transmits this data over the media.
• Following the de-assertion of TXEN, the ICS1893CY-10 terminates
transmission of nibbles over the media.
TXER
42
Input Transmit Error.
When the MAC/Repeater Interface is in:
• 10M MII mode, TXER is not used.
• 100M MII mode:
– The ICS1893CY-10 synchronously samples its TXER signal on the
rising edges of its TXCLK signal.
– The assertion of TXER by the MAC/repeater causes the
ICS1893CY-10 to transmit an Invalid Symbol.
– the Invalid Error Code Test bit (bit 16.2) is set to logic one, the 5-bit
symbol shown in the Invalid Error Code Translation Table (Table
7-17) is used instead of the normal 4B/5B encoding described in the
ISO/IEC specification.
Note: The Invalid Symbol used for this function is the HALT symbol,
which is substituted for the transmit nibble received from the
MAC/repeater whenever the TXER is asserted.
8.3.4.2 MAC/Repeater Interface Pins for 100M Symbol Interface
Table 8-6 lists the MAC/Repeater Interface pin descriptions for the 100M Symbol Interface.
Table 8-6. MAC/Repeater Interface Pins: 100M Symbol Interface
MII Pin
Name
COL
100M
Symbol
Pin
Name
–
CRS
SCRS
MDC
MDC
MDIO MDIO
RXCLK SRCLK
Pin
Pin
No. Type
Pin Description
49
No Collision (Detect).
Connect For the 100M Symbol Interface, this pin is a no connect. For
more information, see Table 5-1.
50 Output Symbol Carrier Sense.
This pin’s description is the same as that given in Table 8-5.
31 Input Management Data Clock.
This pin’s description is the same as that given in Table 8-5.
30 Input/ Management Data Input/Output.
Output This pin’s description is the same as that given in Table 8-5.
38 Output (Symbol) Receive Clock.
In Symbol Mode, the ICS1893CY-10 sources an SRCLK to a
MAC/repeater. The SRCLK synchronizes the signals on the
SRD[4:0] pins between the ICS1893CY-10 and the
MAC/repeater. The SRCLK frequency is 25MHz.
ICS1893CY-10 Rev 1/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
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