KSZ8895FLXC View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
KSZ8895FLXC
Microchip Technology
'KSZ8895FLXC' PDF : 108 Pages View PDF
KSZ8895MQX/RQX/FQX/MLX
3.4.18 PORT 5 MAC 5 SWITCH SW5-RMII INTERFACE FOR THE KSZ8895RQX
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface (MII). The
KSZ8895RQX supports RMII interface at Port 5 switch side and provides a common interface at MAC5 layer in the
device, and has the following key characteristics:
• Supports 10 Mbps and 100 Mbps data rates.
• Uses a single 50 MHz clock reference (provided internally or externally): in internal mode, the chip provides a ref-
erence clock from the SMRXC pin to the SMTXC pin and provides the clock to the opposite clock input pin for
RMII interface. In external mode, the chip receives 50 MHz reference clock from an external oscillator or opposite
RMII interface.
• Provides independent 2-bit wide (bi-bit) transmit and receive data paths.
KSZ8895RQX supports MAC5 RMII interfaces at the switch side:
• For the detail of SW5-RMII (Port 5 MAC5 RMII) signals connection see the table below:
• The KSZ8895RQX can provide a 50 MHz reference clock for both MAC to MAC and MAC to PHY RMII interfaces
when SW5-RMII is used in the clock mode of the device (default with strap pin LED2_2 internal pull-up for the
clock mode).
• The KSZ8895RQX can also receive a 50 MHz reference clock from an external 50 MHz clock source or opposite
RMII to SW5-RMII SMTXC pin when the device is set to normal mode (the strap pin LED2_2 is pulled down).
When the device is strapped to normal mode by pin LED2_2 pull-down, the reference clock comes from SMTXC which
will be used as the device’s clock source. The external 25MHz crystal clock from pins X1/X2 will be ignored.
Note that in normal mode, the 50 MHz clock from SMTXC will be used as the clock source for whole device. The PHY5
PMTXC/PMREFCLK pin can’t be used as the clock source for whole device. The pin of PMTXC/PMREFCLK can
receive the 50 MHz clock from PMRXC when the device is strapped to normal mode and an external 50 MHz reference
clock comes in from pin SMTXC. In normal mode, the 50 MHz clock on pin SMRXC can be disabled by register, and
the PMRXC 50 MHz clock can be used when P5-RMII interface is used.
There is a Register 12 bit 6 to monitor the status of the device for the clock mode or normal mode.
When using an external 50 MHz clock source as RMII reference clock, the KSZ8895RQX should be set to normal mode
by pulling down its LED2_2 strap-in pin first before power up reset or warm reset. The normal mode of the KSZ8895RQX
device will start to work when it gets the 50 MHz reference clock from pin SMTXC/SMREFCLK from an external 50 MHz
clock source. For the RMII connection examples, please refer to the application note included in the design kit.
TABLE 3-6: PORT 5 MAC5 SW5-RMII CONNECTION
SW5-RMII MAC-to-MAC Connection
(PHY Mode)
External
MAC
Signal
(Note 3-1)
SW Signal
Type
Description
SW5-RMII MAC-to-PHY Connection
(MAC Mode)
External
PHY
Signal
(Note 3-1)
SW Signal
Type
REF_CLK
CRS_DV
RXD1
RXD0
TX_EN
TXD1
TXD0
(not used)
xSMRXC
SMRXDV/
SMCRSDV
SMRXD[1]
SMRXD[0]
SMTXEN
SMTXD[1]
SMTXD[0]
(not used)
Output (Clock
mode with
50 MHz);
Reference Clock
—
Normal mode
w/o connection
Output
Output
Output
Input
Input
Input
—
Carrier Sense/
Receive Data Valid
Receive Data Bit 1
Receive Data Bit 0
CRS_DV
RXD1
RXD0
Transmit Data Enable TX_EN
Transmit Data Bit 1
Transmit Data Bit 0
Receive Error
TXD1
TXD0
(not used)
SMTXC/
SMREFCLK
SMTXEN
SMTXD[1]
SMTXD[0]
SMRXDV/
SMCRSDV
SMRXD[1]
SMRXD[0]
(not used)
Input (clock
comes from
SMRXC in
clock mode or
external clock
in normal
mode)
Input
Input
Input
Output
Output
Output
—
DS00002246A-page 34
2016 Microchip Technology Inc.
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