KSZ8895FLXC View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
KSZ8895FLXC
Microchip Technology
'KSZ8895FLXC' PDF : 108 Pages View PDF
KSZ8895MQX/RQX/FQX/MLX
3.1.4 SCRAMBLER/DE-SCRAMBLER (100BASE-TX ONLY)
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline wander.
The data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). This can generate a 2047-
bit non-repetitive sequence. The receiver will then descramble the incoming data stream with the same sequence at the
transmitter.
3.1.5 100BASE-FX OPERATION
100BASE-FX operation is very similar to 100BASE-TX operation except that the scrambler/descrambler and MLT3
encoder/decoder are bypassed on transmission and reception. In this mode, the auto-negotiation feature is bypassed
since there is no standard that supports fiber auto-negotiation.
3.1.6 100BASE-FX SIGNAL DETECTION
The physical port runs in 100BASE-FX fiber mode for the Port 3 and Port 4 of the KSZ8895FQX. This signal is internally
referenced to 1.2V. The fiber module interface should be set by a voltage divider such that FXSDx ‘H’ is above this 1.2V
reference, indicating signal detect, and FXSDx ‘L’ is below the 1.2V reference to indicate no signal. There is no auto-
negotiation for 100BASE-FX mode, the ports must be forced to either full or half-duplex for the fiber ports. Note that
strap-in options support Port 3 and Port 4 to disable auto-negotiation, force 100Base-FX speed, force duplex mode, and
force flow control for KSZ8895FQX with unmanaged mode.
3.1.7 100BASE-FX FAR END FAULT
Far end fault occurs when the signal detection is logically false from the receive fiber module. When this occurs, the
transmission side signals the other end of the link by sending 84 1s followed by a zero in the idle period between frames.
The far end fault may be disabled through register settings.
3.1.8 10BASE-T TRANSMIT
The output 10BASE-T driver is incorporated into the 100BASE-T driver to allow transmission with the same magnetics.
They are internally wave-shaped and pre-emphasized into outputs with typical 2.3V amplitude. The harmonic contents
are at least 27 dB below the fundamental when driven by an all-ones Manchester-encoded signal.
3.1.9 10BASE-T RECEIVE
On the receive side, input buffer and level detecting squelch circuits are employed. A differential input receiver circuit
and a PLL perform the decoding function. The Manchester-encoded data stream is separated into clock signal and NRZ
data. A squelch circuit rejects signals with levels less than 400 mV or with short pulse widths in order to prevent noises
at the RXP or RXM input from falsely triggering the decoder. When the input exceeds the squelch limit, the PLL locks
onto the incoming signal and the KSZ8864CNX/RMNUB decodes a data frame. The receiver clock is maintained active
during idle periods in between data reception.
3.1.10 MDI/MDI-X AUTO CROSSOVER
To eliminate the need for crossover cables between similar devices, the KSZ8895MQX/RQX/FQX/MLX supports HP
Auto MDI/MDI-X and IEEE 802.3u standard MDI/MDI-X auto crossover. HP Auto MDI/MDI-X is the default.
The auto-sense function detects remote transmit and receive pairs and correctly assigns transmit and receive pairs for
the KSZ8895MQX/RQX/FQX/MLX device. This feature is extremely useful when end users are unaware of cable types
and saves on an additional uplink configuration connection. The auto-crossover feature can be disabled through the
port control registers or MIIM PHY registers. The IEEE 802.3u standard MDI and MDI-X definitions are:
TABLE 3-1:
MDI/MDI-X PIN DEFINITIONS
MDI
MDI-X
RJ-45 Pins
1
2
3
6
Signals
TD+
TD–
RD+
RD–
RJ-45 Pins
1
2
3
6
Signals
RD+
RD–
TD+
TD–
2016 Microchip Technology Inc.
DS00002246A-page 21
Share Link: 