KSZ8895FLXC View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

KSZ8895FLXC

Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII Interface

Microchip Technology 

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KSZ8895MQX/RQX/FQX/MLX

3.4.5 FORWARDING

The KSZ8895MQX/RQX/FQX/MLX will forward packets using an algorithm that is depicted in the following flowcharts.

Figure 3-6 shows stage one of the forwarding algorithm where the search engine looks up the VLAN ID, static table, and

dynamic table for the destination address, and comes up with “port to forward 1” (PTF1). PTF1 is then further modified

by the spanning tree, IGMP snooping, port mirroring, and port VLAN processes to come up with “port to forward 2”

(PTF2), as shown in Figure 3-7. This is where the packet will be sent.

The KSZ8895MQX/RQX/FQX/MLX will not forward the following packets:

• Error packets. These include framing errors, FCS errors, alignment errors, and illegal size packet errors.

• 802.3x pause frames. The KSZ8895MQX/RQX/FQX/MLX will intercept these packets and perform the appropriate

actions.

• “Local” packets. Based on destination address (DA) look-up. If the destination port from the look-up table matches

the port where the packet was from, the packet is defined as “local.”

3.4.6 SWITCHING ENGINE

The KSZ8895MQX/RQX/FQX/MLX features a high-performance switching engine to move data to and from the MAC’s

packet buffers. It operates in store and forward mode, while the efficient switching mechanism reduces overall latency.

The KSZ8895MQX/RQX/FQX/MLX has a 64 kB internal frame buffer. This resource is shared between all five ports.

There are a total of 512 buffers available. Each buffer is sized at 128 bytes.

3.4.7 MEDIA ACCESS CONTROL (MAC) OPERATION

The KSZ8895MQX/RQX/FQX/MLX strictly abides by IEEE 802.3 standards to maximize compatibility.

3.4.8 INTER-PACKET GAP (IPG)

If a frame is successfully transmitted, the 96-bit time IPG is measured between the two consecutive MTXEN. If the cur-

rent packet is experiencing collision, the 96-bit time IPG is measured from MCRS and the next MTXEN.

3.4.9 BACK-OFF ALGORITHM

The KSZ8895MQX/RQX/FQX/MLX implements the IEEE Standard 802.3 binary exponential back-off algorithm, and

optional “aggressive mode” back-off. After 16 collisions, the packet will be optionally dropped, depending on the chip

configuration in Register 3. See “Register 3” for additional information.

3.4.10 LATE COLLISION

If a transmit packet experiences collisions after 512-bit times of the transmission, the packet will be dropped.

3.4.11 ILLEGAL FRAMES

The KSZ8895MQX/RQX/FQX/MLX discards frames less than 64 bytes and can be programmed to accept frames up to

1536 bytes in Register 4. For special applications, the KSZ8895MQX/RQX/FQX/MLX can also be programmed to

accept frames up to 1916 bytes in Register 4. Since the KSZ8895MQX/RQX/FQX/MLX supports VLAN tags, the max-

imum sizing is adjusted when these tags are present.

3.4.12 FLOW CONTROL

The KSZ8895MQX/RQX/FQX/MLX supports standard 802.3x flow control frames on both transmit and receive sides.

On the receive side, if the KSZ8895MQX/RQX/FQX/MLX receives a pause control frame, the KSZ8895MQX/RQX/FQX/

MLX will not transmit the next normal frame until the timer, specified in the pause control frame, expires. If another pause

frame is received before the current timer expires, the timer will be updated with the new value in the second pause

frame. During this period (being flow controlled), only flow control packets from the KSZ8895MQX/RQX/FQX/MLX will

be transmitted.

On the transmit side, the KSZ8895MQX/RQX/FQX/MLX has intelligent and efficient ways to determine when to invoke

flow control. The flow control is based on availability of the system resources, including available buffers, available trans-

mit queues and available receive queues.

The KSZ8895MQX/RQX/FQX/MLX flow controls a port that has just received a packet if the destination port resource

is busy. The KSZ8895MQX/RQX/FQX/MLX issues a flow control frame (XOFF), containing the maximum pause time

defined in IEEE standard 802.3x. Once the resource is freed up, the KSZ8895MQX/RQX/FQX/MLX sends out the other

flow control frame (XON) with zero pause time to turn off the flow control (turn on transmission to the port). A hysteresis

feature is also provided to prevent over-activation and deactivation of the flow control mechanism.

 2016 Microchip Technology Inc.

DS00002246A-page 29

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