KSZ8895FLXC View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
KSZ8895FLXC
Microchip Technology
'KSZ8895FLXC' PDF : 108 Pages View PDF
KSZ8895MQX/RQX/FQX/MLX
3.1.12.2 Usage
The following is a sample procedure for using LinkMD with Registers {26, 27, 28, 29} on port 1.
1. Disable Auto-Negotiation by writing a ‘1’ to Register 28 (0x1c), bit [7].
2. Disable auto MDI/MDI-X by writing a ‘1’ to Register 29 (0x1d), bit [2] to enable manual control over the differential
pair used to transmit the LinkMD® pulse.
3. A software sequence set up to the internal registers for LinkMD only, see an example below.
4. Start cable diagnostic test by writing a ‘1’ to Register 26 (0x1a), bit [4]. This enable bit is self-clearing.
5. Wait (poll) for Register 26 (0x1a), bit [4] to return a ‘0’, and indicating cable diagnostic test is completed.
6. Read cable diagnostic test results in Register 26 (0x1a), bits [6:5]. The results are as follows:
00 = normal condition (valid test)
01 = open condition detected in cable (valid test)
10 = short condition detected in cable (valid test)
11 = cable diagnostic test failed (invalid test)
The ‘11’ case, invalid test, occurs when the KSZ8895 is unable to shut down the link partner. In this instance, the test is
not run, because it would be impossible for the KSZ8895 to determine if the detected signal is a reflection of the signal
generated or a signal from another source.
7. Get distance to fault by concatenating Register 26 (0x1a), bit [0] and Register 27 (0x1b), bits [7:0]; and multiplying
the result by a constant of 0.4. The distance to the cable fault can be determined by the following formula:
D (distance to cable fault) = 0.4 x {(Register 26, bit [0]),(Register 27, bits [7:0])}
D (distance to cable fault) is expressed in meters.
Concatenated value of Registers 26 bit [0] and 27 bit [7:0] should be converted to decimal before decrease 26 and mul-
tiplying by 0.4.
The constant (0.4) may be calibrated for different cabling conditions, including cables with a velocity of propagation that
varies significantly from the norm.
For port 2, 3, 4, 5 and for the MIIM PHY registers, LinkMD® usage is similar.
3.1.12.3 A LinkMD Example
The following is a sample procedure for using LinkMD on port 1.
//Set Force 100/Full and Force MDI-X mode
//W is WRITE the register. R is READ register
W 1c ff
W 1d 04
//Set Internal Registers Temporary Adjustment for LinkMD
W 47 b0
W 27 00
W 37 04 (03-port 1, 04-port 2, 05-port 3, 06-port 4, 07-port 5)
W 47 80 (bit7-port 1, bit6-port 2, bit5-port 3, bit4-port 4, bit3-port 5)
W 27 00
W 37 00
//Enable LinkMD Testing with Fault Cable for port 1
W 1a 10
R 1a
R 1b
//Result analysis based on the values of the Register 0x1a and 0x1b for port 1:
//The Register 0x1a bits [6-5] are for the open or the short detection.
//The Register 0x1a bit [0] + the Register 0x1b bits [7-0] = Vct_Fault [8-0]
//The distance to fault is about 0.4 x {Vct_Fault [8-0]}
DS00002246A-page 24
2016 Microchip Technology Inc.
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