KSZ8895FLXC View Datasheet(PDF) - Microchip Technology

Part Name

Description

MFG CO.

KSZ8895FLXC

Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII Interface

Microchip Technology 

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KSZ8895MQX/RQX/FQX/MLX

Note: After testing ends, set all registers above to their default values. The default values are ‘00’ for the Register (0x37)

and the Register (0x47)

3.1.13 ON-CHIP TERMINATION RESISTORS

The KSZ8895MQX/RQX/FQX/MLX reduces the board cost and simplifies the board layout by using on-chip termination

resistors for all ports and RX/TX differential pairs without the external termination resistors. The combination of the on-

chip termination and internal biasing will save power consumption as compared to using external biasing and termina-

tion resistors, and the transformer will not consume power any more. The center tap of the transformer does not need

to be tied to the analog power and does not tie the center taps together between RX and TX pairs for its application.

3.1.14 INTERNAL 1.2V LDO CONTROLLER

The KSZ8895MQX/RQX/FQX/MLX reduces board cost and simplifies board layout by integrating an internal 1.2V LDO

controller to drive a low cost MOSFET to supply the 1.2V core power voltage for a single 3.3V power supply solution.

The internal 1.2V LDO controller can be disabled by Pin 126 IN_PWR_SEL pull-down in order to use an external 1.2V

LDO.

3.2 Power

The KSZ8895 device has two options for the power circuit in the design. one is a single 3.3V supply with 3.3V I/O power

by using internal 1.2V LDO controller and one MOSFET for 1.2V analog and digital power. Another one is using external

1.2V LDO and provide 1.2V power for 1.2V analog and digital power. Table 3-2 illustrates the various voltage options

and requirements of the device.

TABLE 3-2: VOLTAGES AND POWER PINS

Power Signal Name

Device Pins

Requirement

VDDAT

VDDIO

VDDAR

VDDC

GNDA

GNDD

9, 18, 24, 37

59, 77, 100

3, 15, 31

50, 89, 117

2, 6, 12, 16, 21, 27,

30, 34, 127

49, 58, 76, 88, 99,

116

3.3V analog power to the transceiver of the device.

Choice of 1.8V or 2.5V or 3.3V for the I/O circuits. These input power

pins power the I/O circuitry of the device.

Filtered 1.2V analog voltage. This is where filtered 1.2V is fed back

into the device to power the analog block.

Filtered 1.2V digital voltage. This pin feeds 1.2V to digital circuits

within the analog block.

Analog Ground.

Digital Ground.

3.2.1 USING INTERNAL 1.2V LDO CONTROLLER

The preferred method of using the internal 1.2V LDO controller with an external MOSFET is illustrated in the figure

below. The number of capacitors, ferrite beads (FB), values of capacitors, and exact placement of components will

depend on the specific design. The 1.2V rail from the drain pin of the MOSFET to VDDAR Pin 3 is the 1.2V LDO feed-

back path. This connection should be as short as possible and there should be no series components on this feedback

path. When the voltage of Pin 126 is just over 1V, along with the 3.3V power-up, the internal 1.2V LDO controller is

enabled. The 1.2V LDO regulator (internal 1.2V LDO controller plus an external MOSFET) requests about 3.0V voltage

at the ‘S’ pin of MOSFET when the internal 1.2V LDO controller is just enabled, the resistor divider will meet this require-

ment.

 2016 Microchip Technology Inc.

DS00002246A-page 25

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