KSZ8895FLXC View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
KSZ8895FLXC
Microchip Technology
'KSZ8895FLXC' PDF : 108 Pages View PDF
KSZ8895MQX/RQX/FQX/MLX
3.3.3 SOFT POWER-DOWN MODE
The soft power down mode is entered by setting bits [4:3] = 10 in Register 14. When KSZ8895MQX/RQX/FQX/MLX is
in this mode, all PLL clocks are disabled, also all of PHYs and the MACs are off. Any dummy host access will wake-up
this device from current soft power down mode to normal operation mode and internal reset will be issued to make all
internal registers go to the default values.
3.3.4 POWER SAVING MODE
The power saving mode is entered when auto-negotiation mode is enabled, the cable is disconnected, and by setting
bits [4:3] = 11 in Register 14. When KSZ8895MQX/RQX/FQX/MLX is in this mode, all PLL clocks are enabled, MAC is
on, all internal register values will not change, and the host interface is ready for CPU read or write. In this mode, it
mainly controls the PHY transceiver on or off, based on line status to achieve power saving. The PHY continues to trans-
mit, only turning off the unused receiver block. Once activity resumes, due to plugging a cable or attempting by the far
end to establish link, the KSZ8895MQX/RQX/FQX/MLX can automatically enable the PHY to power up to normal power
state from power saving mode.
During power saving mode, the host CPU can set bits [4:3] in Register 14 to change the current power saving mode to
any one of the other three power management operation modes.
3.3.5 PORT-BASED POWER-DOWN MODE
In addition, the KSZ8895MQX/RQX/FQX/MLX features a per-port power-down mode. To save power, a PHY port that
is not in use can be powered down via the Registers Port Control 13 bit 3, or MIIM PHY Registers 0 bit 11.
3.4 Switch Core
3.4.1 ADDRESS LOOK-UP
The internal look-up table stores MAC addresses and their associated information. It contains a 1K unicast address
table plus switching information. The KSZ8895MQX/RQX/FQX/MLX is guaranteed to learn 1K addresses and distin-
guishes itself from a hash-based look-up table, which, depending on the operating environment and probabilities, may
not guarantee the absolute number of addresses it can learn.
3.4.2 LEARNING
The internal look-up engine updates its table with a new entry if the following conditions are met:
• The received packet’s source address (SA) does not exist in the look-up table.
• The received packet is good; the packet has no receiving errors and is of legal length.
The look-up engine inserts the qualified SA into the table, along with the port number and time stamp. If the table is full,
the last entry of the table is deleted first to make room for the new entry.
3.4.3 MIGRATION
The internal look-up engine also monitors whether a station is moved. If this occurs, it updates the table accordingly.
Migration happens when the following conditions are met:
• The received packet’s SA is in the table, but the associated source port information is different.
• The received packet is good; the packet has no receiving errors and is of legal length.
The look-up engine will update the existing record in the table with the new source port information.
3.4.4 AGING
The look-up engine will update the time stamp information of a record whenever the corresponding SA appears. The
time stamp is used in the aging process. If a record is not updated for a period of time, the look-up engine will remove
the record from the table. The look-up engine constantly performs the aging process and will continuously remove aging
records. The aging period is 300 ±75 seconds. This feature can be enabled or disabled through Register 3 or by external
pull-up or pull-down resistors on LED[5][2]. See “Register 3” section for more information.
DS00002246A-page 28
2016 Microchip Technology Inc.
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