LH540245U-20 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LH540245U-20

2048 × 18 / 4096 × 18 Synchronous FIFOs

Sharp Electronics 

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LH540235/45

2048 x 18/4096 x 18 Synchronous FIFOs

Table 4. Status Flags

NUMBER OF UNREAD DATA WORDS PRESENT WITHIN FIFO 1, 2

FULL

FLAG

MIDDLE FLAGS

EMPTY

FLAG

2048 × 18 FIFO

4096 × 18 FIFO

FF

PAF

HF

PAE

EF

0

0

H

H

H

L

L

1 to q

1 to q

H

H

H

L

H

(q + 1) to 1024

(q + 1) to 2048

H

H

H

H

H

1025 to (2048 – (p + 1))

2049 to (4096 – (p + 1))

H

H

L

H

H

(2048 – p) to 2047

(4096 – p) to 4095

H

L

L

H

H

2048

4096

L

L

L

H

H

NOTES:

1. q = Programmable-Almost-Empty Offset value. (Default value: q = 127.)

2. p = Programmable-Almost-Full Offset value. (Default value: p = 127.)

3. Only 11 (2048 × 18), or all 12 (4096 × 18), of the 12 offset-value-register bits should be programmed. The unneeded most-significant-end

2048 × 18 bit should be LOW (zero).

4. The flag output is delayed by one full clock cycle in Enhanced Operating Mode, when synchronous operation is specified for intermediate flags.

BOLD ITALIC = Enhanced Operating Mode

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