Enhanced Super I/O Controller with LPC Interface
Datasheet
DESIRED
BAUD RATE
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
57600
115200
230400
460800
DIVISOR USED TO
GENERATE 16X CLOCK
384
192
96
64
58
48
32
24
16
12
6
3
2
1
32770
32769
PERCENT ERROR DIFFERENCE
BETWEEN DESIRED AND ACTUAL1
-
-
-
-
0.005
-
-
-
-
-
-
0.030
0.16
0.16
0.16
0.16
HIGH
SPEED BIT2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
Note1: The percentage error for all baud rates, except where indicated otherwise, is 0.2%.
Note 2: The High Speed bit is located in the Device Configuration Space.
SMSC DS – LPC47M112
Page 71
DATASHEET
Rev. 02-16-07