LRS1383 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LRS1383

Stacked Chip 32M Flash and 8M SRAM

Sharp Electronics 

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FUM00701

27

Bus

Operation

Command

Comments

Write

Block Erase

<First cycle>

Data=20H

Addr=Within Block to be

Erased

<Second cycle>

Data=D0H

Addr=Within Block to be

Erased

Read

Status Register Data

Addr=Within Block to be

Erased

Standby

Check SR.7

1=WSM Ready

0=WSM Busy

When subsequently erasing a block, repeat the above

sequence.

Full status check can be done after each block erase or

after a sequence of block erasures.

Write FFH after a sequence of block erasures to place

device in read array mode.

Bus

Operation

Command

Comments

Write

Read Status Data=70H

Register Addr=Within Partition

Read

Status Register Data

Addr=Within Partition

Standby

Check SR.7

1=WSM Ready

0=WSM Busy

Standby

Check SR.6

1=Block Erase Suspended

0=Block Erase Completed

Standby

Check SR.2

1=(Page Buffer) Program

Suspended

0=(Page Buffer) Program

Completed

Figure 5.1. Automated Block Erase Flowchart

Appendix to Spec No.: MFM2-J13207 Model No.: LRS1383 March 1, 2001

Rev. 2.20

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