LRS1383 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LRS1383

Stacked Chip 32M Flash and 8M SRAM

Sharp Electronics 

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FUM00701

47

Bus

Operation

Command

Comments

Write

Write

<First cycle>

Data=C0H

Addr=Location to be

Programmed

OTP Program <Second cycle>

Data=Data to be

Programmed

Addr=Location to be

Programmed

Read

Status Register Data

Addr=X

Standby

Check SR.7

1=WSM Ready

0=WSM Busy

Repeat for subsequent OTP program.

SR full status check can be done after each OTP

program, or after a sequence of OTP programs.

Write FFH after the OTP program operation to place

device in read array mode.

Bus

Operation

Command

Comments

Write

Read Status Data=70H

Register Addr=Within Partition

Read

Status Register Data

Addr=Within Partition

Standby

Check SR.7

1=WSM Ready

0=WSM Busy

Figure 13.1. Automated OTP Program Flowchart

Appendix to Spec No.: MFM2-J13207 Model No.: LRS1383 March 1, 2001

Rev. 2.20

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