LTC3717-1 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC3717-1
Linear Technology
'LTC3717-1' PDF : 20 Pages View PDF
LTC3717-1
APPLICATIO S I FOR ATIO
250ns. The minimum off-time limit imposes a maximum
duty cycle of tON/(tON + tOFF(MIN)). If the maximum duty
cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
VIN(MIN)
=
VOUT
tON
+ tOFF(MIN)
tON
Output Voltage Programming
When VFB is connected to VOUT, the output voltage is
regulated to one half of the voltage at the VREF pin. A
resistor connected between VFB and VOUT can be used to
further adjust the output voltage according to the follow-
ing equation:
VOUT
=
VREF
60k + RFB
120k
If VREF exceeds 3V, resistors should be placed in series
with the VREF pin and the VFB pin to avoid exceeding the
input common mode range of the internal error amplifier.
To maintain the VOUT = VREF/2 relationship, the resistor in
series with the VREF pin should be made twice as large as
the resistor in series with the VFB pin.
VOUT
VREF
RFB
249k
RFB
499k
VFB
LTC3717-1
VREF
37171 F04
Figure 4
External Gate Drive Buffers
The LTC3717-1 drivers are adequate for driving up to
about 30nC into MOSFET switches with RMS currents of
50mA. Applications with larger MOSFET switches or oper-
ating at frequencies requiring greater RMS currents will
benefit from using external gate drive buffers such as the
LTC1693. Alternately, the external buffer circuit shown in
Figure 5 can be used. Note that the bipolar devices reduce
the signal swing at the MOSFET gate.
BOOST
DRVCC
Q1
FMMT619
Q3
FMMT619
10Ω
TG
GATE
OF M1
BG
10Ω
GATE
OF M2
Q2
Q4
FMMT720
FMMT720
SW
PGND
37171 F05
Figure 5. Optional External Gate Driver
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC3717-1 as well as a timer for soft-start and overcur-
rent latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC3717-1 into a low quiescent current shutdown
(IQ < 30µA). Releasing the pin allows an internal 1.2µA
current source to charge up the external timing capacitor
CSS. If RUN/SS has been pulled all the way to ground,
there is a delay before starting of about:
( ) tDELAY
=
1.5V
1.2µA
C SS
=
1.3s/µF
C SS
When the voltage on RUN/SS reaches 1.5V, the LTC3717-
1 begins operating with a clamp on ITH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/µF, during which the load current is folded
back. During start-up, the maximum load current is re-
duced until either the RUN/SS pin rises to 3V or the output
reaches 75% of its final value. The pin can be driven from
logic as shown in Figure 6. Diode D1 reduces the start
delay while allowing CSS to charge up slowly for the soft-
start function.
INTVCC
3.3V OR 5V
D1
VIN
RUN/SS
RSS*
CSS
RSS*
D2* RUN/SS
CSS
(6a)
37171 F06
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
(6b)
Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated
sn37171 37171fs
13
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