LTC3717-1 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC3717-1
Linear Technology
'LTC3717-1' PDF : 20 Pages View PDF
LTC3717-1
APPLICATIO S I FOR ATIO
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3717-1 circuits:
1. DC I2R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same RDS(ON), then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I2R
loss. For example, if RDS(ON) = 0.01Ω and RL = 0.005Ω, the
loss will range from 1% up to 10% as the output current
varies from 1A to 10A for a 1.5V output.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capaci-
tance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss ≅ (1.7A–1) VIN2 IOUT CRSS f
3. INTVCC current. This is the sum of the MOSFET driver
and control currents.
4. CIN loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ∆ILOAD (ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability
problem. The ITH pin external components shown in
Figure 1 will provide adequate compensation for most
applications. For a detailed explanation of switching
control loop theory see Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: VIN = VREF = 2.5V, VEXTVCC = 5V, VOUT =
1.25V ±5%, IOUT(MAX) = 10A, f = 250kHz. First, calculate
the timing resistor with VON = VOUT:
RON
=
1.25V(2.5V – 0.7V)
(0.7V)(250kHz)(10pF)2.5V
=
514kΩ
and choose the inductor for about 40% ripple current at
the maximum VIN:
L
=
1.25V
(250kHz)(0.4)(10A)
1−
1.25V
2.5V
=
0.63µH
Selecting a standard value of 0.68µH results in a maximum
ripple current of:
∆IL
=
(250kH1z.2)(50V.68µH) 1–
1.25V
2.5V
=
3.7A
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (RDS(ON) = 0.0083Ω (NOM) 0.010Ω (MAX),
θJA = 40°C/W) yields a nominal sense voltage of:
VSNS(NOM) = (10A)(1.3)(0.0083Ω) = 108mV
sn37171 37171fs
15
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