LTC6945 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC6945' PDF : 28 Pages View PDF
LTC6945
APPLICATIONS INFORMATION
4. Select loop filter components CI and CP based on BW
and RZ. A reliable loop can be achieved by using the
following equations for the loop capacitors (in Farads):
CI
=
2
•
π
3.5
• BW
•
RZ
(7)
CP
=
7
•
π
•
1
BW
•
RZ
(8)
LOOP FILTERS USING AN OPAMP
Some VCO tune voltage ranges are greater than the
LTC6945’s charge pump voltage range. An active loop filter
using an op amp can increase the tuning voltage range.
To maintain the LTC6945’s high performance, care must
be given to picking an appropriate op amp.
The op amp input common mode voltage should be biased
within the LTC6945 charge pump’s voltage range, while
its output voltage should achieve the VCO tuning range.
See Figure 16 for an example op amp loop filter.
The op amp’s input bias current is supplied by the charge
pump; minimizing this current keeps spurs related to fPFD
low. The input bias current should be less than the charge
pump leakage (found in the Electrical Characteristics sec-
tion) to avoid increasing spurious products.
LOOP FILTER
CP
CI
RZ
LF(s)
ICP
CP
–
LTC6945
VCP+
5k
5k
VCO±
(fVCO)
+
VCP+/2
47μF
KVCO
RP2
CP2
6945 F16
Op amp noise sources are highpass filtered by the PLL
loop filter and should be kept at a minimum, as their ef-
fect raises the total system phase noise beginning near
the loop bandwidth. Choose a low noise op amp whose
input-referred voltage noise is less than the thermal noise
of RZ. Additionally, the gain bandwidth of the op amp
should be at least 15 times the loop bandwidth to limit
phase margin degradation. The LT1678 is an op amp that
works very well in most applications.
An additional R-C lowpass filter (formed by RP2 and CP2
in Figure 16) connected at the input of the VCO will limit
the op amp noise sources. The bandwidth of this filter
should be placed approximately 15 to 20 times the PLL
loop bandwidth to limit loop phase margin degradation.
RP2 should be small (preferably much less than RZ) to
minimize its noise impact on the loop. However, picking
too small of a value can make the op amp unstable as it
has to drive the capacitor in this filter.
DESIGN AND PROGRAMMING EXAMPLE
This programming example uses the DC1649. Assume
the following parameters of interest :
fREF = 100MHz at 7dBm into 50Ω
fSTEP = 250kHz
fVCO = 902MHz to 928MHz
KVCO = 15MHz/V to 21.6MHz/V
fRF = 914MHz
Determining Divider Values
Following the Loop Filter Design algorithm, first determine
all the divider values. Using Equations 2, 3, 4 and 5, cal-
culate the following values:
O=1
R = 100MHz/250kHz = 400
fPFD = 250kHz
N = 914MHz/250kHz = 3656
Figure 16. Op Amp Loop Filter
6945f
19
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