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M25PE40-VMN6G View Datasheet(PDF) - Numonyx -> Micron

Part Name
Description
MFG CO.
'M25PE40-VMN6G' PDF : 62 Pages View PDF
M25PE40
DC and AC parameters
Table 20.
AC characteristics (33 MHz operation)
33 MHz only available for products marked since week 40 of 2005(1)
Test conditions specified in Table 14 and Table 15
Symbol Alt.
Parameter
Min.
Typ.
Max. Unit
Clock frequency for the following instructions:
fC
fC
FAST_READ, PW, PP, PE, SE, DP, RDP, WREN, D.C.
WRDI, RDSR
33
MHz
fR
tCH (2)
tCL (2)
Clock frequency for READ instructions
tCLH Clock High time
tCLL Clock Low time
D.C.
13
13
Clock Slew Rate (peak to peak)
0.1
20
MHz
ns
ns
V/ns
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tSHQZ (3)
tCLQV
tCLQX
tTHSL
tSHTL
tDP (3)
tRDP (3)
tPW (4)
tCSS
tDSU
tDH
tCSH
tDIS
tV
tHO
S Active Setup time (relative to C)
S Not Active Hold time (relative to C)
Data In Setup time
Data In Hold time
S Active Hold time (relative to C)
S Not Active Setup time (relative to C)
S Deselect time
Output Disable time
Clock Low to Output Valid
Output Hold time
Top Sector Lock Setup time
Top Sector Lock Hold time
S to Deep Power-down
S High to Standby Power mode
Page Write cycle time (256 bytes)
Page Write cycle time (n bytes)
10
ns
10
ns
3
ns
5
ns
5
ns
5
ns
100
ns
12
ns
12
ns
0
ns
50
ns
100
ns
3
µs
30
µs
11
10.2+
25
ms
n*0.8/256
tPP (4)
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
1.2
0.4+
5
ms
n*0.8/256
tPE
Page Erase cycle time
10
20
ms
tSE
Sector Erase cycle time
1
5
s
1. Details of how to find the date of marking are given in application note, AN1995.
2. tCH + tCL must be greater than or equal to 1/ fC.
3. Value guaranteed by characterization, not 100% tested in production.
4. When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one sequence
including all the bytes versus several sequences of only a few bytes (1 n 256).
49/62
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