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M41ST87WMX6TR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'M41ST87WMX6TR' PDF : 42 Pages View PDF
M41ST87Y, M41ST87W
Figure 19. Tamper Output Timing (with CLR1EXT or CLR2EXT = '1')
TPCLR
tCLRD
tCLR
RST
trec
VOUT(1)
High-Z(2)
IRQ/OUT(3)
(4)
ECON
Tamper
Event
(TB Bit set)
High-Z
AI07083
Note: 1. If connected to a negative charge pump device, this pin must be isolated from the charge pump by using both n-channel and p-
channel MOSFETs as illustrated in Figure 20., page 21.
2. If the device is in battery back-up; NOT on VCC (see RAM Clear External (CLR1EXT and CLR2EXT), page 18).
3. If TIEX = '1.'
4. If ABE = '1.'
Table 5. Tamper Detect Timing
Symbol
Parameter
CLRPW1 CLRPW0 Min
Typ
Max
Unit
tCLRD(1) Tamper RAM Clear Ext Delay
X
X
1.0(2)
1.5
2.0
ms
0
0
1
s
0
1
4
s
tCLR
Tamper Clear Timing
1
0
8
s
1
1
16
s
Note: 1. With input capacitance = 70pF and resistance = 50.
2. If the OF Bit is set, tCLRD(min) = 0.5ms.
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