M58BV016FT7T3T View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
M58BV016FT7T3T
Numonyx -> Micron
'M58BV016FT7T3T' PDF : 70 Pages View PDF
DC and AC parameters
M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
Table 20. Synchronous burst read AC characteristics(1)
Symbol
Parameter
Test condition
M58BW016
Unit
70 80
tAVLL Address Valid to Latch Enable Low
E = VIL
Min 0
tBHKH
Burst Address Advance High to Valid
Clock Edge
E = VIL, G = VIL, L = VIH Min
8
0 ns
8 ns
tBLKH
Burst Address Advance Low to Valid
Clock Edge
E = VIL, G = VIL, L = VIH Min
8
8 ns
tELLL
tGLQV
tKHAX
Chip Enable Low to Latch Enable Low
Output Enable Low to Output Valid
Valid Clock Edge to Address
Transition
E = VIL, L = VIH
E = VIL
Min 0 0 ns
Min 25 25 ns
Min 5 5 ns
tKHLL
tKHLX
Valid Clock Edge to Latch Enable Low
Valid Clock Edge to Latch Enable
Transition
E = VIL
E = VIL
Min 0
Min 0
0 ns
0 ns
E = VIL, M58BW016DT/B Min 3
tKHQX Valid Clock Edge to Output Transition G = VIL,
L = VIH M58BW016FT/B Min 3
M58BW016DT/B Min 6
tLLKH Latch Enable Low to Valid Clock Edge E = VIL
M58BW016FT/B Min 5
tQVKH(2) Output Valid to Valid Clock Edge
E = VIL, G = VIL, L = VIH Min 6
tRLKH
Valid Data Ready Low to Valid Clock
Edge
E = VIL, G = VIL, L = VIH Min
6
3 ns
3 ns
6 ns
5 ns
6 ns
6 ns
tKHQV Valid Clock Edge to Output Valid
E = VIL, G = VIL, L = VIH Max 11 11 ns
1. For other timings see Table 16: Asynchronous bus read AC characteristics.
2. Data output should be read on the valid clock edge.
Figure 14. Synchronous burst read (data valid from ‘n’ clock rising edge)
K
tKHQV
DQ0-DQ31
n
n+1
n+2
n+3
n+4
n+5
tQVKH
Q0
Q1
Q2
Q3
Q4
Q5
tKHQX
SETUP
Burst Read
Q0 to Q3
Note: n depends on Burst X-Latency
1. For set up signals and timings see synchronous burst read.
AI04408b
48/70
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